Design and implementation of RISC-V processor with a single-cycle datapath and controller.
R_Type: add, sub, and, or, sltI_Type: lw, addi, xori, ori, slti, jalrS_Type: swJ_Type: jalB_Type: beq, bne, blt, bgeU_Type: lui
The following assembly code can be converted to machine code using RISC-V Online Assembler.
add X7,X0,X0;
addi X6,X0,10;
Loop:
beq X7,X6,end;
slti X8,X7,2;
lw X1,A(X8)
if:
slt X9,X12,X11;
beq X9,X0,end-if;
add X12,X0,X11;
end-if:
addi X7,X7,1;
J Loop;
end:- Course: Digital Systems 2 [ECE 778]
- Semester: Spring 2023
- Institution: School of Electrical & Computer Engineering, College of Engineering, University of Tehran
- Instructors: Dr. Safari
- Contributors: Fardin Abbasi, Soheil Abdollahi
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