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Currently the CPU2 bits define the 6502 variant, if CPU=0.

For CPU=1 no further definition is given for CPU2.

I want to clarify this like so:

CPU2 combinations for CPU=1:

%0000    : 65816 in native mode
others    : not defined yet

In general, CPU=0 should define basic 64k type CPU (with minor exceptions like the 65ce02 or 65816 in emulation mode), whereas CPU=1 should define more advanced CPU variants that allow for a larger address space more natively.

Potential candidates are

1. 65k in 16 bit mode, 32 bit mode, or 64 bit mode
2. ???

IF the C65 really needs a new CPU definition, use CPU2 bits %0110

But is it really needed?

In GeckOS V2, in some cases an undefined reference is not added, but subtracted from another value.

One specific case is where ROMSTART defines the beginning of the "rom" image that is scanned for executable file images. Within the rom image, each entry defines how much "rom" is mapped from the top of memory into the specific tasks memory map (note this is relevant to MMU-based ports). The resulting code where this value is defined looks like:

     .byt > $ff - ROMSTART

ROMSTART is an address that may be redefined during the build process through relocation of the rom image.

This cannot be relocated at this time, as o65 does not define a negative undefined value.

To overcome this, the following is proposed:

Currently the segment ID is defined as:

0		undefined
1		absolute value
2		text segment
3		data segment
4		bss segment
5		zero segment

where "absolute value" does not appear in the relocation table. This segment ID, however, is used in the list of exported globals, but there no undefined segment appears.

The proposal is:

1. use segment ID value "1" as "negative undefined" entry in the relocation table
2. use segment ID value "1" as "absolute value" in the list of exported globals.

This achieves the following:

1. existing loaders should note an "illegal" segment value and should refuse to load such a file, doing a "fail fast" approach (avoid extensive troubleshooting)
2. no extra bit used

An alternative would have been to use e.g. bit $10 in the segment ID, but this is only relevant in exactly one segment, and wasted otherwise. Also existing loaders may ignore this bit. So, it is the redefinition of the absolute segment for the relocation table.

In "classic" 6502 program sometimes it is assumed that the stack is fixed at $01xx, and is accessed directly, like

     TSX
     LDA $0101,X

to get a parameter value from the stack.

This, however, conflicts with some more modern 6502 variants, most notably the 65816, where the stack can be moved to anywhere in bank zero.

So, to allow 65816-based systems to identify programs that use this approach (and either handle it, or refuse to load it), a new header bit is proposed:

     mode.8 :     dstack   0= (ignored)    1= program accesses stack directly via addresses $01xx

32-bit relocation may become relevant in extended 65xx variant CPUs. This may be far-fetched, but even if not needed now, it should be defined at least as "reserved", so that no further changes will block this.

In the relocation table the type entry currently defines these types:

WORD	$80	2 byte address
HIGH	$40	high byte of an address
LOW	$20	low byte of an address
SEGADR	$c0	3 byte address (65816)
SEG	$a0	segment byte of 3 byte address

To support 32-bit relocation, we assume that we do not need to handle the 3rd and 4th byte separately, and allow only high word relocation, in addition to 32 bit relocation:

LONG	$e0	4 byte address
HWORD	$60 upper 2 bytes of a 4 byte address

In the case of HWORD, the entry is followed by the lower two bytes of the address similar to the low byte of a HIGH relocation.