Enrique Carbonell Enriquez's Projects
Verliog code implementing a 16-bit RISC processor to execute instructions in a streamlined manner, employing a simplified instruction set to enhance performance. This project was made for my Introduction to VLSI Design class.
anomaly detection program that models a linear relationship between two sets of data and then tests for anomalies in a separate dataset. This project was made for my introduction to computer programming class.
This script performs classification on a synthetic dataset using Bayesian classification, estimating error probabilities, and comparing results with the average risk minimization rule. This project was made for my Introduction to Machine Learning class.
Basic C program displaying the class average based on the number of students. This project was made for my introduction to computer programming class.
Calculation of the 40th Fibonacci number using two different methods. This project was made for my Systems Programming for Engineers class.
Python script that calculates the hash value of a file using the hashlib library and saves the result to an output file.
This Verilog project design an IEEE Single Precision Floating Point Multiplier. This project was made for my Introduction to VLSI Design class.
MATLAB script that implements the k-nearest neighbors (KNN) algorithm for classification. The dataset is divided into training and testing sets, and the algorithm is applied for different values of k. This project was made for my Introduction to Machine Learning class.
Implementation of simple linear regression, a method for finding the best-fit line through a set of data points. This project was made for my introduction to computer programming class.
Code utilized to format a string of a MAC address that was wrong formatted.
CypherLock for a peripheral Interface Controller built in my Microcomputer Systems class.
Python script that defines a function called battle that simulates a battle between monsters. The goal is to keep eliminating monsters until only one or none are left. This project was made for my System Programming for Engineers class.
Non-Sequential counter to count in four bit an eight digit (137ACF29) in order. This project was made for my Digital Systems Design class.
Python script that generates assembly code for a "nop slide" function based on the provided parameters. This project was made for my System Programming for Engineers class.
Pong Game implemented in FPGA intended for use with a VGA display. This project was made for my Digital Systems Design class.
8-bit Shift Multiplier with an 8-bit zero 2-1 mux and 8-bit signed adder/subtractor. This project was made for my Computer Organization and Architecture class.
This Verilog project design a 64-byte synchronous memory. This project was made for my Introduction to VLSI Design class.
Python Script that demostrates the use of threading and multithreading on a Linux Machine. This project was made for my System Programming for Engineers class.
Python script that defines a class called triangle that represents a triangle and provides various methods to manipulate and calculate properties of the triangle. This project was made for my Systems Programming for Engineers class.
Calculation of output voltage in a simple voltage divider circuit. This project was made for my C++ and Data Structures class.
Repository to save Senior Design Project (IoT Water Meter)