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Hi @dspsandbox
May i please bother you again: so i have followed all the instructions on tutorial 1(LED_BLINK) on Vivado up-to generating the bitstream file (overlay)
However when i program the Red-Pitaya with the overlay image i'm getting this error - any advice on how to fix this?
Hello
I test the echo analog programm but I want to Connect only ADC directly on DAC.
It’s not working .I have Vivado 2019.1
I have make the same design on the demo écho analog.
Thanks for your reply
Cordially
Fabzz60
Hi, analysing the VHDL code for the IP Redpitaya-125-14-adc I have some concern about the conversion of the 14 bit sample from the adc into a 16 bit sample with MSb alignment, i.e. with a x4 multiplication.
adc_data_1_tdata(15) <= data_1(13); adc_data_1_tdata(14 downto 2) <= not data_1(12 downto 0); adc_data_1_tdata(1 downto 0) <= (others => (not data_1(0)));
The last line copies in the lower 2 bits of the 16 bit word, which are left empty by the left shift, the lsb of the 14 bit word.
But shouldn't they be always zero?
Hi, @dspsandbox Thanks for your work and for sharing your knowledge- I am also from a physics background this is very helpful for me. I would like to ask where can i download the Red-Pitaya 125-14 constraints file? as the provided link seems not to be working.
Thanks
After the tutorial for the use of DMA it would be very interesting to make use of that setup as follows:
I can of course answer questions or help to give a better description when needed
In this tutorial we are going to demonstrate how to blink the LEDs of your Redpitaya-124-14
url : https://github.com/dspsandbox/FPGA-Notes-for-Scientists/wiki/LED-blink
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