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Apple Firestorm/Icestorm CPU microarchitecture docs
Please excuse me for asking questions here. I hope I'm not being a pain. I just read Erik Engheims interesting article on the Secret Apple M1 Coprocessor where you are mentioned. I'm confused by Apple's documentation. I'm wondering what machine learning on the CPU means? Is that on Apple's Neural Engine? And then, of course, Apple mentions two ML Accelerators which I think could be two cores in their AMX coprocessor? If I'm at all correct about this, for reasons of flexibility in design, Apple has hidden the details of where the code runs. I believe that unless one requests the GPU, training & inference occur, as Apple's neural controller determines, on either the two ML accelerators or the 16 cores of the ANE. Moreover, If my calculations are correct, the ANE has 2048 ALUs that are analogous to CUDA cores. Does this seem right to you? Additionally, do the two ML Accelerators each have 128 additional ALUs? And finally, can the ANE access all of the M1's available integrated memory and swap? Sorry for the long list of questions. I appreciate any info you can give. Thank you.
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