Internal testing of the FABulous FPGA fabric generator. Specifications occur in 6 different files, resulting in varying RTL output:

fabric.csv (configuration specified on page 7-8{pdf:12-13} of FABulous documentation)
tiles.csv
LUT.vhd
pad.vhd
CLB.list
IO.list

FABulous was written by Dirk Koch, Nguyen Dao, Bea Healy, Jing Yu, and Andrew Attwood. I did not write any portion of it. It is released under Apache License 2.0.

Dirk Koch, Nguyen Dao, Bea Healy, Jing Yu, and Andrew Attwood. 2021. FABulous: An Embedded FPGA Framework. In The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '21). Association for Computing Machinery, New York, NY, USA, 45–56. DOI:https://doi.org/10.1145/3431920.3439302