clamchowder / microbenchmarks Goto Github PK
View Code? Open in Web Editor NEWTrying to figure various CPU things out
License: Apache License 2.0
Trying to figure various CPU things out
License: Apache License 2.0
I had try to run "clammicrobench rob 1024 5000000", it seem stop at 512 entry? how to make it run up to 1024 entry?
I think the max entry 512 is not enough for ADL?
I had created a batch file, but I am not sure the option settings for RKL or other new CPUs:
clammicrobench.exe rob > "Reorder Buffer Test.txt"
clammicrobench.exe intrf > "Integer RF Test.txt"
clammicrobench.exe fprf > "FP (64-bit scalar) RF Test.txt"
clammicrobench.exe vec128rf > "Vector (128-bit packed int) RF Test.txt"
clammicrobench.exe vec256rf > "Vector (256-bit packed fp) RF Test.txt"
clammicrobench.exe addsched > "Integer (add) Scheduler Capacity Test.txt"
clammicrobench.exe mulsched > "Integer (64-bit mul) Scheduler Capacity Test.txt"
clammicrobench.exe mul16sched > "Integer (16-bit mul) Scheduler Capacity Test.txt"
clammicrobench.exe mul32sched > "Integer (32-bit mul) Scheduler Capacity Test.txt"
clammicrobench.exe faddsched > "FP (32-bit add) Scheduler Capacity Test.txt"
clammicrobench.exe fmulsched > "FP (32-bit multiply) Scheduler Capacity Test.txt"
clammicrobench.exe fadd256sched > "256-bit FADD Scheduler Capacity Test.txt"
clammicrobench.exe mixfaddfmulsched > "FP (mixed 32-bit add and multiply) Scheduler Capacity Test.txt"
clammicrobench.exe jmpsched > "Not-taken Jump Scheduler Capacity Test.txt"
clammicrobench.exe flagrf > "Flags register file capacity.txt"
clammicrobench.exe mixintfprf > "Mix of integer and FP register file.txt"
clammicrobench.exe loadsched > "Load scheduler capacity test.txt"
clammicrobench.exe storesched > "Store Address Scheduler Capacity Test.txt"
clammicrobench.exe storedatasched > "Store (Data) Scheduler Capacity Test.txt"
clammicrobench.exe ldq > "Load Queue Test (loads pending retire).txt"
clammicrobench.exe stq > "Store Queue Test (stores pending retire).txt"
clammicrobench.exe mixldqstq > "Mixed Load and Store Queue Test (mem ops pending retire).txt"
clammicrobench.exe returnstack > "Return Stack Depth Test.txt"
clammicrobench.exe mshrs > "Miss Status Handling Registers Capacity Test.txt"
clammicrobench.exe cvtsched > "I2F (cvtsi2ss) Scheduler Capacity Test.txt"
clammicrobench.exe rorsched > "Rotate Scheduler Capacity Test.txt"
clammicrobench.exe mixmulschedtest > "Mixed Integer (64 and 16-bit mul) Scheduler Capacity Test.txt"
clammicrobench.exe tbb > "Taken Branch Buffer Test (taken branches pending retire).txt"
clammicrobench.exe bob > "Branch Order Buffer Test (not-taken branches pending retire).txt"
clammicrobench.exe ymmstateintrf > "10:1 Integer vs FP RF Test with YMM (AVX) state.txt"
clammicrobench.exe add256rf > "256-bit Integer Add RF Capacity Test.txt"
clammicrobench.exe add256sched > "256-bit Integer Add Scheduler Capacity Test (128-bit on ARM).txt"
clammicrobench.exe btb4n > "Branch Target Buffer, branch every 4 bytes.txt"
clammicrobench.exe btb8n > "Branch Target Buffer, branch every 8 bytes.txt"
clammicrobench.exe btb16n > "Branch Target Buffer, branch every 16 bytes.txt"
clammicrobench.exe mixmuljmpsched > "Mixed integer multiply and not-taken Jump Scheduler Capacity Test.txt"
clammicrobench.exe mixmulrorsched > "Mixed Multiply and Rotate Scheduler Capacity Test.txt"
clammicrobench.exe branchhist > "Branch predictor pattern recognition.txt"
clammicrobench.exe indirectbranch > "Indirect branch prediction.txt"
Hi @clamchowder,
I found in MemoryBandwidth.c, under NUMA mode, there is a hardcode number (https://github.com/clamchowder/Microbenchmarks/blob/master/MemoryBandwidth/MemoryBandwidth.c#L620):
As the comment indicates, it may be for KNL. So should we recover the numaNodeCount
back to numa_max_node() + 1
for other CPUs?
Thanks,
troore
.\SimpleAffinitySetter.exe 2 ping 127.0.0.1
Affinity mask: 4
Unhandled Exception: System.IndexOutOfRangeException: Index was outside the bounds of the array.
at SimpleAffinitySetter.Program.Main(String[] args)
PS G:\git\Microbenchmarks\AsmGen\bin\Release\net7.0-windows> ./AsmGen.exe autocopy
Automatically copying files, based on default VS paths
Moved clammicrobench_nasm_zen3rob.asm
Moved clammicrobench_nasm_rob.asm
Unhandled exception. System.IO.FileNotFoundException: Could not find file 'G:\git\Microbenchmarks\AsmGen\bin\Release\net7.0-windows\clammicrobench_nasm_rob.asm'.
File name: 'G:\git\Microbenchmarks\AsmGen\bin\Release\net7.0-windows\clammicrobench_nasm_rob.asm'
at System.IO.File.Move(String sourceFileName, String destFileName, Boolean overwrite)
at AsmGen.Program.CopyFiles(String targetDir, String[] fileNames) in G:\git\Microbenchmarks\AsmGen\Program.cs:line 212
at AsmGen.Program.Main(String[] args) in G:\git\Microbenchmarks\AsmGen\Program.cs:line 196
Build with latest clone and just changed the target framework to 6.0 or 7.0(because 5.0 would cause 'Metrics' does not exist in the namespace 'System.Diagnostics' error).
Is there a VS 2019 project file for the instructionrate?
Hi @clamchowder,
I want to pin thread to cpu when measuring bandwidth, but I found that there seems no such facility under the non-numa mode. So I just borrow this part from CoherenceLatency:
void *ReadBandwidthTestThread(void *param) {
BandwidthTestThreadData* bwTestData = (BandwidthTestThreadData*)param;
if (hardaffinity) {
sched_setaffinity(gettid(), sizeof(cpu_set_t), &global_cpuset);
} else {
// I add the following lines:
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
CPU_SET(bwTestData->processorIndex, &cpuset);
sched_setaffinity(gettid(), sizeof(cpu_set_t), &cpuset);
fprintf(stderr, "thread %ld set affinity %d\n", gettid(), bwTestData->processorIndex);
}
...
}
Besides, the processorIndex
is calculated by thread_idx % nprocs
according to the processor to core id mapping from /proc/cpuinfo
.
I test on AMD Ryzen 7 5800X CPU, where only one numa node is equipped (8 physical cores, and 16 logical cores). So I didn't enable numa.
I got the following results:
In the figure above, "auto" means I run original MemoryBandwith code, while "manual" means I added the CPU_SET
and sched_setaffinity
as the code snippet shows. The left and right figures show 8 and 16 threads results respectively.
My question is, why are the "manual" bandwidth results lower than those of "auto" for 8 threads, while the "manual" catches up for 16 threads?
Thanks,
troore
any plans on creating a linux based cli build instructions and tests?
I ran a couple of the specific makes that had a makefile in them and arm options.
to build the "main" clammicrobench I've tried using msbuild on ubuntu 20.04 running on EC2 instance (aarch64 cpu).
in the solution file I'm only seeing x64 and win32 options for build.
{7E8CF2BA-57A7-4B42-B721-97E02BF9A8B8}.Debug|x64.Build.0 = Debug|x64
{7E8CF2BA-57A7-4B42-B721-97E02BF9A8B8}.Debug|x86.ActiveCfg = Debug|Win32
{7E8CF2BA-57A7-4B42-B721-97E02BF9A8B8}.Debug|x86.Build.0 = Debug|Win32
{7E8CF2BA-57A7-4B42-B721-97E02BF9A8B8}.Release|x64.ActiveCfg = Release|x64
{7E8CF2BA-57A7-4B42-B721-97E02BF9A8B8}.Release|x64.Build.0 = Release|x64
{7E8CF2BA-57A7-4B42-B721-97E02BF9A8B8}.Release|x86.ActiveCfg = Release|Win32
{7E8CF2BA-57A7-4B42-B721-97E02BF9A8B8}.Release|x86.Build.0 = Release|Win32
it's very possible that I'm missing something here but I would rather ask than assume and make a mess.
NASM is available only in rpm format (possible to install on ubuntu but somewhat too forced and might cause other issues down the line).
reached this repo basically after reading the blog post about graviton 3 (https://chipsandcheese.com/2022/05/29/graviton-3-first-impressions/)
thanks in advance
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