I have faced issue below:
sh# make
[CC] x86_64/processor_local_storage.c
In file included from x86_64/processor_local_storage.c:9:0:
./x86_64/include/lapic.h:87:17: error: inline function ‘cpu’ declared but never defined [-Werror]

"Copyright" strings are present in the source, but I found no project's License.
For those interested to reuse your code, it would be nice to have it present.

In the case you have not decided which one to choose yet and should you like permissive approach (vs copyleft one), I offer you to consider the Blue Oak Model License announced by a lawyer a year ago:
https://writing.kemitchell.com/2019/03/09/Deprecation-Notice.html

Author also responds to some of the doubts here:
https://news.ycombinator.com/item?id=19347797

Hi Jie, When I was trying boot to bare metal machine with PXE, But I got issue "!(eax & VMXON_LOCK_FLAG) failed". According to Intel manual Feature control msr lock flag is cleared when logical processor is reset.

VMXON is also controlled by the IA32_FEATURE_CONTROL MSR (MSR address 3AH). This MSR is cleared to zero when a logical processor is reset. ... Bit 0 is the lock bit. If this bit is clear, VMXON causes a general-protection exception. If the lock bit is set, WRMSR to this MSR causes a general-protection exception; the MSR cannot be modified until a power-up reset condition. System BIOS can use this bit to provide a setup option for BIOS to disable support for VMX. To enable VMX support in a platform, BIOS must set bit 1, bit 2, or both (see below), as well as the lock bit.
I wonder is it firmware depended issue?

Full log:

[info] vm_monitor/vmx_misc.c:37 cpu feature:vmx supported
[info] vm_monitor/vmx_misc.c:67 EAX LOCK 5
[assert] vm_monitor/vmx_misc.c:72 !(eax & VMXON_LOCK_FLAG) failed
[info] x86_64/panic.c:71 cpu:0, idt.base:0x257000 idt.size:0xfff
[info] x86_64/panic.c:73 tr:0x450028, gdt.base:0x211038 gdt.size:0x427
[info] x86_64/panic.c:75 fs.base:0x0, gs.base:0x0 efer:0x500
[info] x86_64/panic.c:77 cr4:0x20, cr3:0x845c000, cr2:0x0, cr0:0x80000011
[info] x86_64/panic.c:110     frame #0 <205106>
[info] x86_64/panic.c:110     frame #1 <20657e>
[info] x86_64/panic.c:110     frame #2 <20069e>
[info] x86_64/panic.c:110     frame #3 <20086f>
[info] x86_64/panic.c:110     frame #4 <200044>

BTW: I've loaded kernel successfully to bare metal machine with PXE :).

ZeldaOS is used QEMU TCG as accelerator but TCG doesn't support VMX. That's why I've changed accelerator as enable-kvm.
Issue for TCG:
warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit 5]
warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit 5]
warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit 5]
warning: TCG doesn't support requested feature: CPUID.01H:ECX.vmx [bit 5]

Command line:
qemu-system-x86_64 -enable-kvm -cpu host,-kvm_pv_eoi,-kvm_steal_time,-kvm_asyncpf,-kvmclock,+vmx -drive file=Zelda64.img,if=ide -smp 4 -m 1024 -serial stdio -monitor null -nographic

Even today the floppies are still being used, for example - as virtual floppies inside the coreboot open source BIOS. Just imagine: your wonderful OS could be a part of someone's BIOS build! (for coreboot supported motherboard, maybe you have or could get one - see https://www.coreboot.org/Supported_Motherboards )

@chillancezen , If you already have a coreboot-supported motherboard, or a real chance to get one, - wouldn't it be cool to be able to launch your own OS straight from the BIOS chip? ;) With one simple command its possible to add any floppy to coreboot BIOS build - and then you see it as a boot entry! Multiple floppies could be added this way (as long as you have enough space left inside the BIOS flash chip, luckily LZMA compression could be used for the stored floppies to reduce their occupied size)

如题:relaxed:

I've configured CPU_BASED_VM_EXEC_CONTROL bitmap for handling hlt instruction to exit to host state. But it didn't worked correctly. I expected interrupt handler when executing vm_exit_handler procedure. Do you have any idea about that?

.section .text
.code64

.global vm_exit_handler
.global halting


halting:
	hlt


vm_exit_handler:

    int $0x45
    hlt


void trampoline(void){
    __asm__("hlt");
}


static void
initialize_vmcs_guest_state(struct vmcs_blob *vm)
{
#define _(encoding, value) {                                                   \
    ASSERT(vmx_write((encoding), (value)) == ERROR_OK);                        \
    ASSERT(vmx_read((encoding)) == (value));                                   \
}
    unsigned long val;
    val = read_msr(MSR_IA32_VMX_PROCBASED_CTLS);
    val |= CPU_BASED_HLT_EXITING;
    _(CPU_BASED_VM_EXEC_CONTROL, (uint32_t)val);
    _(GUEST_RIP, (uint64_t)&halting);

    _(VMCS_LINK_POINTER, -1UL);
#undef _
}