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Need to breakout the motor controller to its own block. Phase currents, resolver signals, and drive signals should be packed into a standard interface, ie. motor_block[12..0].

The MAX1139 state machine reads an extra byte during read operations. This is likely caused by state_hold3 asserting 'data_ready' for continued write operations. It dents the overall read speed! </3 no other impact.

Time [s], Analyzer Name, Decoded Protocol Result
0.003168208333333,I2C,Setup Write to [0b 0110 1010] + ACK
0.003190708333333,I2C,0b 1101 0010 + ACK
0.003220500000000,I2C,Setup Write to [0b 0110 1010] + ACK
0.003243000000000,I2C,0b 0000 0101 + ACK
0.003272791666667,I2C,Setup Read to [0b 0110 1011] + ACK
0.003313166666667,I2C,0b 1111 1100 + ACK
0.003335625000000,I2C,0b 0011 1100 + ACK
0.003358125000000,I2C,0b 1111 1111 + ACK
0.003380625000000,I2C,0b 0101 0111 + ACK
0.003403125000000,I2C,0b 1111 1101 + ACK
0.003425625000000,I2C,0b 1010 1111 + ACK
0.003448125000000,I2C,0b 1111 1100 + NAK

MAX1139 state machine sets up the ADC every communication. Relates to Issues #1. Simply need to change the return from 'state_done' to 'state_reset' to a new 'state_idle' where the system waits for the 'trigger_in' signal.

Time [s], Analyzer Name, Decoded Protocol Result
0.000607000000000,I2C,Setup Write to [0b 0110 1010] + ACK
0.000629500000000,I2C,0b 1101 0010 + ACK
0.000659333333333,I2C,Setup Write to [0b 0110 1010] + ACK
0.000681833333333,I2C,0b 0000 0101 + ACK
0.000711625000000,I2C,Setup Read to [0b 0110 1011] + ACK
0.000751958333333,I2C,0b 1111 1100 + ACK
0.000774416666667,I2C,0b 0100 0000 + ACK
0.000796916666667,I2C,0b 1111 1111 + ACK
0.000819416666667,I2C,0b 0101 0001 + ACK
0.000841916666667,I2C,0b 1111 1101 + ACK
0.000864416666667,I2C,0b 1010 1110 + ACK
0.000886916666667,I2C,0b 1111 1100 + NAK
0.001461541666667,I2C,Setup Write to [0b 0110 1010] + ACK
0.001484041666667,I2C,0b 1101 0010 + ACK
0.001513833333333,I2C,Setup Write to [0b 0110 1010] + ACK
0.001536333333333,I2C,0b 0000 0101 + ACK
0.001566166666667,I2C,Setup Read to [0b 0110 1011] + ACK
0.001606500000000,I2C,0b 1111 1100 + ACK
0.001628958333333,I2C,0b 0011 0101 + ACK
0.001651458333333,I2C,0b 1111 1111 + ACK
0.001673958333333,I2C,0b 0100 1111 + ACK
0.001696458333333,I2C,0b 1111 1101 + ACK
0.001718958333333,I2C,0b 1010 1011 + ACK
0.001741458333333,I2C,0b 1111 1100 + NAK
0.002313666666667,I2C,Setup Write to [0b 0110 1010] + ACK
0.002336166666667,I2C,0b 1101 0010 + ACK
0.002365958333333,I2C,Setup Write to [0b 0110 1010] + ACK
0.002388458333333,I2C,0b 0000 0101 + ACK
0.002418291666667,I2C,Setup Read to [0b 0110 1011] + ACK
0.002458625000000,I2C,0b 1111 1100 + ACK
0.002481083333333,I2C,0b 0011 1001 + ACK
0.002503583333333,I2C,0b 1111 1111 + ACK
0.002526083333333,I2C,0b 0101 0011 + ACK
0.002548583333333,I2C,0b 1111 1101 + ACK
0.002571083333333,I2C,0b 1010 1100 + ACK
0.002593583333333,I2C,0b 1111 1100 + NAK

The MAX1139 supports 1.7 MHz I²C communication rates. Set the SCL frequency to match and test.