东北大学数电课设,基于VHDL的数字时钟,开发板芯片型号为Altera 的 EP4CE6F17C8
时钟具有整点报时,数码管显示,设定时间,转换计时机制,复位的功能,代码有详细注释,编译器版本为Quartus II 18.0
数电课设,用VHDL做的数字时钟,开发板芯片型号为Altera 的 EP4CE6F17C8
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