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casper-optimizers

chaidnn

HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs

drama

DRAM Simulator

drampower

Fast and accurate DRAM power and energy estimation tool

dramsim2

DRAMSim2: A cycle accurate DRAM simulator

gem5

The official repository for the gem5 computer-system architecture simulator.

gem5-aladdin

End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.

learning_gem5

Learning gem5 is a work-in-progress book to help gem5 users get started using gem5.

machsuite

Benchmarks for Accelerator Design and Customized Architectures

mcpat

An integrated power, area, and timing modeling framework for multicore and manycore architectures

mqsim

MQSim is a fast and accurate simulator modeling the performance of modern multi-queue (MQ) SSDs as well as traditional SATA based SSDs.

neural-architecture-search

Basic implementation of [Neural Architecture Search with Reinforcement Learning](https://arxiv.org/abs/1611.01578).

neurospector

NeuroSpector: Dataflow and Mapping Optimization of Deep Neural Network Accelerators

nn_dataflow

Explore the energy-efficient dataflow scheduling for neural networks.

perf-book-cn

https://github.com/dendibakh/perf-book gitbook在线电子书，翻译成中文原始markdown文档

pommel

Analysing power consumption of the memory subsystem for machine learning applications

ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

scale-sim

https://github.com/ARM-software/SCALE-Sim

smaug

SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin

supergluepretrainednetwork

SuperGlue: Learning Feature Matching with Graph Neural Networks (CVPR 2020, Oral)

systolic-array-dataflow-optimizer

A general framework for optimizing DNN dataflow on systolic array

vampire

An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 paper by Ghose et al. (https://people.inf.ethz.ch/omutlu/pub/VAMPIRE-DRAM-power-characterization-and-modeling_sigmetrics18_pomacs18.pdf)

vitis-ai

Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.

vitis-tutorials

Vitis In-Depth Tutorials