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autows

charm

CHARM: Composing Heterogeneous Accelerators for Matrix Multiply on Versal ACAP Architecture (Full Paper accepted to FPGA2023!)

finn

Dataflow compiler for QNN inference on FPGAs

fpgaconvnet-torch

mixed-td

mlir-aie

An MLIR-based toolchain for AMD AI Engine-enabled devices.

nn-meter

A DNN inference latency prediction toolkit for accurately modeling and predicting the latency on diverse edge devices.

onnx2keras

Convert ONNX model graph to Keras model format.

scale-sim

streamsvd

svd-nas

tiny

MLPerf™ Tiny is an ML benchmark suite for extremely low-power systems such as microcontrollers

tiny_yolo_v3_zynq

Implement Tiny YOLO v3 on ZYNQ

ultralytics

NEW - YOLOv8 🚀 in PyTorch > ONNX > OpenVINO > CoreML > TFLite

verilog-ethernet

Verilog Ethernet components for FPGA implementation

zeroq

[CVPR'20] ZeroQ: A Novel Zero Shot Quantization Framework