ycyang0508 Goto Github PK

1bit_precoding

80x86

80186 compatible SystemVerilog CPU core and FPGA reference design

a2i

ac_types

Algorithmic C Datatypes

adisdr

ahb3lite_interconnect

AHB3-Lite Interconnect

ahb3lite_memory

Multi-Technology RAM with AHB3Lite interface

ahb3lite_pkg

Common SystemVerilog package used by all RoaLogic IP with AMBA AHB3-Lite interfaces

airisc_core_complex

Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional periperals.

amba_axi_ahb_apb

AMBA bus lecture material

amiq_apb

SystemVerilog VIP for AMBA APB protocol

amiq_blog

Code snippets from articles published on www.amiq.com/consulting/blog

amiq_eth

Library defining all Ethernet packets in SystemVerilog and in SystemC

ao486

The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.

arm_amba_design

Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.

async_fifo

This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is coded by me(Xianghzi Meng)

awesome-opensource-asic-resources

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

axi-bfm

AXI3 Bus Functional Models (Master & Slave)

axi4-interface

AXI4 and AXI4-Lite interface definitions

bch-63-56-

bch_verilog

Verilog based BCH encoder/decoder

boost_parser_test

booth_multipliers

Parameterized Booth Multiplier in Verilog 2001

bt_modem

channel-estimation-examples

channel-estimation-ofdm-

-Investigated the efficiency of different estimators to estimate and track channel parameters based on the Mean Squared Error (MSE) performance. The estimators employed in the simulation are LS and MMSE estimators and their performance in the transfer domain was evaluated. MATLAB was used for the simulation of the communication link and analyzing the error between the estimated channel parameters and actual modeled channel parameters.

channelcodingprojectlist

List of open source channel coding projects and libraries.

chiptester

Team I's chip tester

classbench-ng

A tool for generation of synthetic classification rule sets for benchmarking.