Error when compiling gemmini about gemmini HOT 7 CLOSED

I want to generate verilog files of gemmini merely. After modifying 'build.sbt' according to https://stackoverflow.com/questions/58365679/value-is-not-a-member-of-chisel3-bundle, there remain 42 errors.

username0@Ubuntu:~/Chipyard/chipyard/generators/gemmini$ sbt compile
[info] welcome to sbt 1.3.13 (Ubuntu Java 11.0.10)
[info] loading settings for project gemmini-build from plugins.sbt ...
[info] loading project definition from /home/username0/Chipyard/chipyard/generators/gemmini/project
[info] loading settings for project gemmini from build.sbt ...
[info] set current project to gemmini (in build file:/home/username0/Chipyard/chipyard/generators/gemmini/)
[info] Executing in batch mode. For better performance use sbt's shell
[info] Compiling 43 Scala sources to /home/username0/Chipyard/chipyard/generators/gemmini/target/scala-2.12/classes ...
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:9:8: not found: object testchipip
[error] import testchipip.TLHelper
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:113:14: not found: value TLHelper
[error] val node = TLHelper.makeClientNode(
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:114:5: value name_= is not a member of gemmini.StreamReaderCore[T,U,V]
[error] name = "stream-reader", sourceId = IdRange(0, nXacts))
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:114:29: not found: value sourceId
[error] name = "stream-reader", sourceId = IdRange(0, nXacts))
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:209:20: value Get is not a member of Any
[error] val get = edge.Get(
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:210:7: not found: value fromSource
[error] fromSource = io.reserve.xactid,
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:211:7: not found: value toAddress
[error] toAddress = read_paddr,
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:212:7: not found: value lgSize
[error] lgSize = read_lg_size
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:215:8: value a is not a member of Any
[error] tl.a.valid := state === s_req_new_block && io.reserve.ready
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:216:8: value a is not a member of Any
[error] tl.a.bits := get
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:218:57: value a is not a member of Any
[error] io.reserve.valid := state === s_req_new_block && tl.a.ready // TODO decouple "reserve.valid" from "tl.a.ready"
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:236:14: value a is not a member of Any
[error] when (tl.a.fire()) {
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:254:8: value d is not a member of Any
[error] tl.d.ready := io.beatData.ready
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:255:29: value d is not a member of Any
[error] io.beatData.valid := tl.d.valid
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:256:35: value d is not a member of Any
[error] io.beatData.bits.xactid := tl.d.bits.source
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:257:33: value d is not a member of Any
[error] io.beatData.bits.data := tl.d.bits.data
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:258:39: value d is not a member of Any
[error] io.beatData.bits.lg_len_req := tl.d.bits.size
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:259:35: value last is not a member of Any
[error] io.beatData.bits.last := edge.last(tl.d)
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:259:43: value d is not a member of Any
[error] io.beatData.bits.last := edge.last(tl.d)
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:288:14: not found: value TLHelper
[error] val node = TLHelper.makeClientNode(
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:289:5: value name_= is not a member of gemmini.StreamWriter[T]
[error] name = "stream-writer", sourceId = IdRange(0, nXacts))
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:289:29: not found: value sourceId
[error] name = "stream-writer", sourceId = IdRange(0, nXacts))
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:325:31: value a is not a member of Any
[error] val xactBusy_add = Mux(tl.a.fire(), (1.U << xactId).asUInt(), 0.U)
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:326:35: value d is not a member of Any
[error] val xactBusy_remove = ~Mux(tl.d.fire(), (1.U << tl.d.bits.source).asUInt(), 0.U)
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:326:56: value d is not a member of Any
[error] val xactBusy_remove = ~Mux(tl.d.fire(), (1.U << tl.d.bits.source).asUInt(), 0.U)
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:416:24: value Put is not a member of Any
[error] val putFull = edge.Put(
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:417:7: not found: value fromSource
[error] fromSource = RegEnableThru(xactId, state === s_writing_new_block),
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:418:7: not found: value toAddress
[error] toAddress = write_paddr,
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:419:7: not found: value lgSize
[error] lgSize = lg_write_size,
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:420:7: not found: value data
[error] data = (req.data >> (bytesSent * 8.U)).asUInt()
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:423:27: value Put is not a member of Any
[error] val putPartial = edge.Put(
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:424:7: not found: value fromSource
[error] fromSource = RegEnableThru(xactId, state === s_writing_new_block),
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:425:7: not found: value toAddress
[error] toAddress = write_paddr,
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:426:7: not found: value lgSize
[error] lgSize = lg_write_size,
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:427:7: not found: value data
[error] data = ((req.data >> (bytesSent * 8.U)) << (write_shift * 8.U)).asUInt(),
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:428:7: not found: value mask
[error] mask = write_mask.asUInt()
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:431:8: value a is not a member of Any
[error] tl.a.valid := (state === s_writing_new_block || state === s_writing_beats) && !xactBusy.andR()
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:432:8: value a is not a member of Any
[error] tl.a.bits := Mux(write_full, putFull, putPartial)
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:433:8: value d is not a member of Any
[error] tl.d.ready := xactBusy.orR()
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/DMA.scala:435:14: value a is not a member of Any
[error] when (tl.a.fire()) {
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/FrontendTLB.scala:42:56: not found: value nSets
[error] val tlb = Module(new TLB(false, lgMaxSize, TLBConfig(nSets=1, nWays=entries)))
[error] ^
[error] /home/username0/Chipyard/chipyard/generators/gemmini/src/main/scala/gemmini/FrontendTLB.scala:42:65: not found: value nWays
[error] val tlb = Module(new TLB(false, lgMaxSize, TLBConfig(nSets=1, nWays=entries)))
[error] ^
[error] 42 errors found
[error] (Compile / compileIncremental) Compilation failed
[error] Total time: 18 s, completed May 7, 2021, 8:12:24 PM

How can I import Testchipip?

from gemmini.

This is unusual. Which command are you using to build Gemmini? Also, have you setup Chipyard? I believe Testchipip is a part of Chipyard.

from gemmini.

I use the command "sbt compile" in directory "chipyard/generators/gemmini", but the Testchipip is not in gemmini's default package path.

"import testchipip.TLHelper" results in errors.

from gemmini.

Oh, I see. That's not how you should build Gemmini.

Gemmini needs to be built as part of Chipyard.

You can set up Chipyard by following the instructions here: https://chipyard.readthedocs.io/en/latest/Chipyard-Basics/Initial-Repo-Setup.html#initial-repository-setup

Afterwards, you can build Gemmini by following the instructions here: https://chipyard.readthedocs.io/en/latest/Generators/Gemmini.html

from gemmini.

Thanks! Follow your guide, "chipyard.TestHarness.GemminiRocketConfig.top.v" is generated. Is it the overall verilog file including all components of Gemmini and RocketChip that can be synthesized later?

from gemmini.

Yes, although there is also a file called chipyard.TestHarness.GemminiRocketConfig.top.mems.v which should have your memories.

from gemmini.

Closing the issue for now. Feel free to re-open if you have more questions about the verilog files

from gemmini.