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100g-fpga-network-stack-core

This repo contains the Limago code

a-novel-algorithmic-data-collision-sdram-based-tcam-architecture-using-ddr-sdram-on-fpga

accdnn

A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.

accelerating-cnn-with-fpga

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.

ae-pcie-dma-axi

way to use xapp1052 with new version of PCIe IP core（AXI bus）

aes

Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.

aes128

Hardware Accelerator for AES 128-bit Encryption and Decryption implemented (in Verilog) in Altera's FPGA board.

ai-nvme

amorphos

AmorphOS open source FPGA operating system project

ascon-verilog

Verilog Hardware Design of Ascon v1.2

async_fifo

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

async_fifo-1

位宽和深度可定制的异步FIFO

automatic-verilog

automatic-verilog-vimscript

axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

axi-crossbar

An AXI4 crossbar implementation in SystemVerilog

axi4-interface

AXI4 and AXI4-Lite interface definitions

axi4_interconnect

AXI总线连接器

axi4lite2uart

This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.

axi_dma

General Purpose AXI Direct Memory Access

axi_dma_2

axi_mem_if

Simple single-port AXI memory interface

axi_sram

支持AXI总线协议的8k×8 SP SRAM

axidmacheck

AXI DMA Check: A utility to measure DMA speeds in simulation

axis_usbd

AXI-Stream USB 2.0 HS Device Bridge (Verilog)

barvinn

BARVINN: A Barrel RISC-V Neural Network Accelerator: https://barvinn.readthedocs.io/en/latest/

basic_cache_core

basic_verilog

Must-have verilog systemverilog modules

bch_verilog

Verilog based BCH encoder/decoder

bitcoinhash

Project creating code for an FPGA that can search for specific values for the bitcoin blockchain.

bitonic-sorting-in-verilog

Bitonic Sorting in Verilog which sorts any number of elements which are a power of two