stevobailey Goto Github PK
Name: Stevo
Type: User
Name: Stevo
Type: User
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
Provides various testers for chisel users
new firrtl based chisel
Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
Radio astronomy lab group work
A scala based simulator for circuits described by a LoFirrtl file
Sample Android project
Machine learning on FPGAs using HLS
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Python-based Real Yahoo Stock Market Simulator
splinter - python test framework for web applications
Verilator open-source SystemVerilog simulator and lint system
RISC-V Zve32x Vector Coprocessor
A declarative, efficient, and flexible JavaScript library for building user interfaces.
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.