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amdvlk

AMD Open Source Driver For Vulkan

chestnut

cms

Contest Management System

compute-engine

Highly optimized inference engine for Binarized Neural Networks

cpu-energy-meter

A tool for measuring energy consumption of (Intel) CPUs

crow

Source code for the architectural and circuit-level simulators used for modeling the CROW (Copy-ROW DRAM) mechanism proposed in our ISCA 2019 paper "CROW: A Low-Cost Substrate for Improving DRAM Performance, Energy Efficiency, and Reliability". Paper is at: https://people.inf.ethz.ch/omutlu/pub/CROW-DRAM-substrate-for-performance-energy-reliability_isca19.pdf.

densenet

Densely Connected Convolutional Networks, In CVPR 2017 (Best Paper Award).

elasticcuckoohashing

(elastic) cuckoo hashing

explorekit

fos

FOS - FPGA Operating System

gcc

gem5

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.

gentext

geospark

A Cluster Computing System for Processing Large-Scale Spatial Data

geospark-notify-android

Location Based Notification Application Using GeoSpark SDK

hammertime

how-to-make-a-computer-operating-system

How to Make a Computer Operating System in C++

knowledge_distillation_via_tf2.0

The codes for recent knowledge distillation algorithms and benchmark results via TF2.0 low-level API

levelwt

LevelWT algorithms for Parallel Wavelet Tree Construction

llvm-project

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

ltspice-cli

A command line tool for automating LTspice simulations

mahout

Mirror of Apache Mahout

mqsim

MQSim is a fast and accurate simulator modeling the performance of modern multi-queue (MQ) SSDs as well as traditional SATA based SSDs. MQSim faithfully models new high-bandwidth protocol implementations, steady-state SSD conditions, and the full end-to-end latency of requests in modern SSDs. It is described in detail in the FAST 2018 paper by Arash Tavakkol et al., "MQSim: A Framework for Enabling Realistic Studies of Modern Multi-Queue SSD Devices" (https://people.inf.ethz.ch/omutlu/pub/MQSim-SSD-simulation-framework_fast18.pdf)

ocaml-multicore

Multicore OCaml

parallel-inplace-radixsort

parsec-benchmark

An unofficial mirror of the core PARSEC 3.0 benchmark suite with patches to run on x86_64 Arch Linux and generalize builds.

pcm

Processor Counter Monitor

ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

ramulator-pim

A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combines a widely-used simulator for out-of-order and in-order processors (ZSim) with Ramulator, a DRAM simulator with memory models for DDRx, LPDDRx, GDDRx, WIOx, HBMx, and HMCx. Ramulator is described in the IEEE CAL 2015 paper by Kim et al. at https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf Ramulator-PIM is used in the DAC 2019 paper by Singh et al. at https://people.inf.ethz.ch/omutlu/pub/NAPEL-near-memory-computing-performance-prediction-via-ML_dac19.pdf

ramulatorsharp

RamulatorSharp is a fast and flexible memory subsystem simulator implemented in C# and it can easily run on Linux, OS X, and Windows. The simulator contains the implementation of the Low-Cost Inter-Linked Subarrays (HPCA 2016) and ChargeCache (HPCA 2016) in addition to other features present in the C++ version of Ramulator: https://users.ece.cmu.edu/~omutlu/pub/lisa-dram_hpca16.pdf https://users.ece.cmu.edu/~omutlu/pub/chargecache_low-latency-dram_hpca16.pdf