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b-sumner avatar b-sumner commented on August 28, 2024

@JNYXR your situation is not clear to me. But if you are writing HIP source code, then I would recommend using __builtin_nontemporal_{load, store}. This will work on all targets.

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JNYXR avatar JNYXR commented on August 28, 2024

@b-sumner Thank you for your reply,CUDA can set the -Xptxas-dlcm = cg-Xptxas-dscm =wt compiler option to bypass L1 CACHE. Does HIP have compiler options or environment variables? I want to verify whether L1 CACHE affects my kernel, so I want to try bypass L1 CACHE.

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