Comments (4)
@ZenithalHourlyRate even prior to #106 the slli
instruction was considered a pseudo op of the RV64 slli
instruction (here). I have simply maintained that relationship here.
Right now the parse.py script is not going to dump any pseudo-ops into the code if the original instruction is already present. This is because there are instructions like slli
in RV32 which have the same mnemonics as the original instruction in RV64 but vary in encodings. This makes it difficult to create unique entries in the instruction yaml (even some code for that matter) for each instruction.
If you want to build a decoder for rv32 you can use the following command : make EXTENSIONS="rv32* unratified/rv32*"
which would generate the correct encoding for the use-case you have defined.
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If you want to build a decoder for rv32 you can use the following command :
make EXTENSIONS="rv32* unratified/rv32*"
which would generate the correct encoding for the use-case you have defined.
Thanks for this information! Unfortunately rocket chip uses the same inst.chisel
for both RV32 and RV64, so if I want to make rocket chip work I need to generate both file and merge them, which is painful and not maintainable.
Right now the parse.py script is not going to dump any pseudo-ops into the code if the original instruction is already present.
Is it possible that the parse.py
script could detect the difference in encoding and generate different entries when output encoding related codes. For mnemonics they could be the same.
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for both RV32 and RV64, so if I want to make rocket chip work I need to generate both file and merge them, which is painful and not maintainable.
If you are maintaining a single decoder for both RV32 and RV64 , then it would make sense to include the xlen checks in your decoder itself instead of overloading it in the inst.chisel. For example in rocket maybe moving this check inside this class would solve the problem ? This is similar to what spike does when encodings vary based on XLEN - it has further explicit encoding checks based on XLEN.
Is it possible that the parse.py script could detect the difference in encoding and generate different entries when output encoding related codes. For mnemonics they could be the same.
This is achievable but this would affect other artifacts as well - like the latex table generation. The instruction names in those tables will also change to SLLI_RV32_I
which is not acceptable by the spec.
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For example in rocket maybe moving this check inside this class would solve the problem ?
Thanks! I will try to refactor that. Closing this issue now as it is deemed as an API change instead of a bug.
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Related Issues (20)
- RV32_I has only 3 instructions? HOT 3
- Conflicts with shared opcodes HOT 5
- instr_dict should contain instruction format HOT 9
- Split `rv_zicbo` file into `zicbom`, `zicboz`, `zicbop`
- Change constant.py to constant.json HOT 1
- Constants.py is duplicated between riscv-opcodes and riscv-config? HOT 4
- Cannot turn tex files into PDF HOT 2
- Use ULL (unsigned long long) suffixes in generated encoding.h file HOT 2
- encoding conflict between Zfbf/fcvt.bf16.s and Zfa/fround.h HOT 4
- Wrong encoding of Vector Mask-Register Logical Instructions HOT 2
- Wrong encoding of fmvp.d.x instruction HOT 4
- Use fd/fs# for floating point operands HOT 6
- redefined instruction: c.ld in rv64_c and rv128_c
- Wrong encoding for C extension on golang
- Unclear grammar / Exceptions to instruction syntax HOT 7
- Small Typo in the readme HOT 1
- In encoding.h, MSTATEEN0_HENVCFGH is wrong HOT 2
- Make instr_dict.yaml more detailed HOT 1
- Update CLIC CSR_xINTSTATUS addresses, add CSR_xINTTHRESH HOT 1
- why is there no definition for Zfhmin? HOT 2
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