Comments (1)
aswaterman
commented on August 26, 2024
(1) The nf field distinguishes segment loads/stores from regular loads/stores. For example, vlseg3e32.v is the nf=2 case of this instruction:
Line 25 in 2497a8c
(2) rvv-opcodes is only concerned with the bit positions of the operands, not their meanings. So there is no distinction between simm5 and uimm5.
from riscv-opcodes.
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