Comments (2)
Thanks. I will follow that form for mstatus and sstatus.
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It is true that masked_csr_t
requires the mask be static, but you can instead inherit directly from csr_t
and implement your own custom read-masking function. This way, the masking can be a function of other dynamic state. For an example, see epc_csr_t
, which forms its read mask based upon IALIGN, which can change at runtime when the C extension is disabled.
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Related Issues (20)
- From double trap spec, we saw that Ssdbltrp adds an SDT field to sstatus. But will mstatus has this bit? HOT 2
- Segmentation Fault when interrupt handled while interrupts are disabled in machine mode HOT 3
- Commit 584f8551 appears to break enabling the virtualization extension. HOT 1
- Zicntr not listed as supported extension HOT 2
- Spike does not implement the functions of VTA and MTA for "Written with 1s" HOT 8
- `fsqrt.s` with zero source register results `NaN` instead of `0` HOT 3
- Illegal Instruction overlap difference between vfwadd_wf and vwadd_wx HOT 1
- How to change vector extension configuration(vlen, elen)? HOT 4
- `fdiv.s` with a dynamic rounding mode set to `REN` on the spike results in a incorrect rounding HOT 1
- `fmv.w.x` is illegal? HOT 6
- Bug Fix Suggestion for v1.1.0 HOT 1
- Installation Guide for v1.1.0
- SPIKE + PK C++ `iostream` support HOT 2
- Wrong mstatus.[SXL|UXL] for RV64I in M-mode only config HOT 4
- RV32E - exception priority issue HOT 1
- Discrepancy with respect to maskmax field in mcontrol (spec vs spike) HOT 3
- trap instruction page fault error and mode shifting from M-mode to U-mode in spike debug mode
- Logging the value of registers at a certain point during the simulation possible? HOT 1
- RISC-V Standard Spec Trace Support
- VI_LD_INDEX issue HOT 3
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