Comments (10)
I am working on it .
from v8.
(gdb) x /20i 0x0000003ff7ffc5e8
0x3ff7ffc5e8: ebreak
0x3ff7ffc5ec: frflags a2
0x3ff7ffc5f0: andi a2,a2,16
0x3ff7ffc5f4: seqz a2,a2
0x3ff7ffc5f8: fsflags t3
0x3ff7ffc5fc: li t3,0
0x3ff7ffc600: beq a2,t3,0x3ff7ffc61c
0x3ff7ffc604: mv a0,a1
0x3ff7ffc608: mv sp,s0
0x3ff7ffc60c: ld s0,0(sp)
0x3ff7ffc610: ld ra,8(sp)
0x3ff7ffc614: addi sp,sp,16
0x3ff7ffc618: ret
0x3ff7ffc61c: feq.s s3,fa0,fa0
0x3ff7ffc620: beqz s3,0x3ff7ffc64c
0x3ff7ffc624: fmv.d.x fs9,zero
=> 0x3ff7ffc628: flt.s s3,fa0,fs9
0x3ff7ffc62c: bnez s3,0x3ff7ffc640
0x3ff7ffc630: li a1,-1
0x3ff7ffc634: slli a1,a1,0x3f
(gdb) info registers fa0
fa0 {float = -inf, double = -nan(0xfffffff800000)} (raw 0xffffffffff800000)
(gdb) info registers fs9
fs9 {float = 0, double = 0} (raw 0x0000000000000000)
(gdb) si
0x0000003ff7ffc62c in ?? ()
(gdb) p s3
No symbol "s3" in current context.
(gdb) info registers s3
s3 0x0 0
(gdb) x /20i 0x0000003ff7ffc5e8
result of flt.s
is incorrect on hifive-unleashed but right on qemu. @penguinwu @fw-brice
I open a issue on riscv sw-dev https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/mfGw77uQYwc
from v8.
I complie a simple code:
int main() {
float i = -std::numeric_limits<float>::infinity();
float j = 0;
bool g = i < j ;
}
gdb info:
(gdb) x /20i 0x1064c
0x1064c <main+24>: flw fa5,-24(s0)
0x10650 <main+28>: flt.s a5,fa4,fa5
=> 0x10654 <main+32>: snez a5,a5
0x10658 <main+36>: sb a5,-25(s0)
0x1065c <main+40>: li a5,0
0x1065e <main+42>: mv a0,a5
0x10660 <main+44>: ld s0,24(sp)
0x10662 <main+46>: addi sp,sp,32
0x10664 <main+48>: ret
(gdb) info registers fa4
fa4 {float = -inf, double = -nan(0xfffffff800000)} (raw 0xffffffffff800000)
(gdb) info registers fa5
fa5 {float = 0, double = -nan(0xfffff00000000)} (raw 0xffffffff00000000)
(gdb) info registers a5
a5 0x1 1
(gdb)
instr flt.s a5,fa4,fa5
is right. but why my above code is incorrect?
I set s3 to 0x55
(gdb) info registers s3
s3 0x55 85
(gdb) x /20i 0x3ff7ffc628
=> 0x3ff7ffc628: flt.s s3,fa0,fs9
0x3ff7ffc62c: bnez s3,0x3ff7ffc640
0x3ff7ffc630: li a1,-1
0x3ff7ffc634: slli a1,a1,0x3f
0x3ff7ffc638: addi a1,a1,-1
0x3ff7ffc63c: j 0x3ff7ffc604
0x3ff7ffc640: li a1,-1
0x3ff7ffc644: slli a1,a1,0x3f
0x3ff7ffc648: j 0x3ff7ffc604
0x3ff7ffc64c: li a1,0
0x3ff7ffc650: j 0x3ff7ffc604
0x3ff7ffc654: nop
0x3ff7ffc658: unimp
0x3ff7ffc65a: unimp
0x3ff7ffc65c: nop
0x3ff7ffc65e: unimp
0x3ff7ffc660: unimp
0x3ff7ffc662: unimp
0x3ff7ffc664: unimp
0x3ff7ffc666: unimp
(gdb) info registers fa0
fa0 {float = -inf, double = -nan(0xfffffff800000)} (raw 0xffffffffff800000)
(gdb) info registers fs9
fs9 {float = 0, double = 0} (raw 0x0000000000000000)
(gdb) si
0x0000003ff7ffc62c in ?? ()
(gdb) info registers s3
s3 0x0 0
from v8.
I run this case in qemu. It's ok but incorrect in hifive unleashed
from v8.
The documentation about FEQ.S, FLT.S, and FLE.S states:
For all three instructions, the result is 0 if either operand is NaN.
from v8.
The documentation about FEQ.S, FLT.S, and FLE.S states:
For all three instructions, the result is 0 if either operand is NaN.
But the operand is inf not NaN.And i write a sample code, the result is right in hifive.
from v8.
Oh right. Sorry, I read that too quickly 😬
from v8.
The documentation about FEQ.S, FLT.S, and FLE.S states:
For all three instructions, the result is 0 if either operand is NaN.
I got it, fs9 is NaN. So the zero set incorrtectly.
from v8.
Oh right. Sorry, I read that too quickly 😬
Gdb bug in fs9, It's NaN not zero.
from v8.
@fw-brice refer to https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/mfGw77uQYwc/m/1IrLgMpWAwAJ
from v8.
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from v8.