KA10: DSDEV - Deselection and PDP-6/10 intercom device about sims HOT 7 CLOSED

From hardware memo # 1

Some devices are simply hard-wired to either the PDP-6 or the PDP-10. There is an added input on the device-select gate which is wired to either the PA or PB line on the bus. If the device also has a PI register then the PI driver is enabled by either the PA or PB. The IOB RESET line must also be ANDed with the appropriate PA or PB line. Other devices, however, are assignable by program to either machine. There is a special card, one of which exists per device, which remembers to which processor the device is assigned. This card is called an X100 and occupies one Flip Chip card slot. The X100 basically contains a 3-state flipflop or triflop, the states of which reflect: selected for Processor A, selected for Processor B, or unassigned. The inputs to the X100 card are the PA and PB lines from the bus, a set-select input and a clear-select input. A pulse on the set-select input, if the device is not assigned to a processor, will select the processor that is currently active on the bus. Usually the device CONO-Clear pulse will be connected to the set-select input of the X100 so that the first CONO will assign the device automatically to that processor. CONO is chosen because it allows the processor to select a PI channel in the same instruction. The clear-select pulse is produced on the bus by a specially-interpreted I/O instruction, a DATAO device 20. This de-assigns the device if the device was assigned to this processor and if in the DATAO 20 instruction, bit 0 or some other unique bit wired for this device is a 1. Thus DATAO 20 with bit 0 on, will de-assign all devices whereas with bit 3 on will only de-assign the device which happens to be wired to bit 3. There are two main output of the X100. The first output is the device-gate output. This is true whenever the bus is active for the assigned processor, or it is always true if the device is unassigned. This is used to gate the device selection. There is also another feature built into the X100 card, which is a gate that is normally driven by the device CONI level and will read in a 1 on bit 0. This allows the processor to check for a successful assignment, because if the device is assigned to the other processor then the device CONO level will not be developed and a 1 will not be read in on bit 0.

from sims.

Some code in ITS unconditionally assumes this CONI bit 0 feature is present.

from sims.

Mike Speciner's GALAXY program checks this bit for the IMX device. (Called ADM in this program.)

from sims.

This device is also used to send interrupts from the PDP-10 to the PDP-6, and vice versa.

from sims.

What is the status of this request Lars?

from sims.

It's not implemented yet, except for the PDP-10 interrupting the PDP-6.

On the other hand, we don't have sharing of an I/O bus, so the the deselection part isn't needed. I think you can close this, and if we see a need in the future we can open a new issue then.

from sims.

I will close this and you can reopen it if you want to add it. However it probably does not make sense on simulator.

from sims.