Implementation is failed about openpiton HOT 9 CLOSED

Huh, this is strange. Can you check the other logs (vivado.log, protosyn_logs/) under build/genesys2/system/? Did the synthesis run actually start? Which Vivado version are you using?

from openpiton.

Huh, this is strange. Can you check the other logs (vivado.log, protosyn_logs/) under build/genesys2/system/? Did the synthesis run actually start? Which Vivado version are you using?

thanks, the synthesis has already run, and the Vivado version is 2018.3.the vivado.log and protosyn_logs have reported the warning :
【 WARNING: [IP_Flow 19-3664] IP 'clk_mmcm' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/clk_mmcm/clk_mmcm.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'clk_mmcm' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/clk_mmcm/clk_mmcm_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'clk_mmcm' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/clk_mmcm/clk_mmcm_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'clk_mmcm' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/clk_mmcm/clk_mmcm_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'clk_mmcm' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/clk_mmcm/clk_mmcm_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'afifo_w64_d128_std' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/afifo_w64_d128_std/afifo_w64_d128_std.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'afifo_w64_d128_std' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/afifo_w64_d128_std/afifo_w64_d128_std_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'afifo_w64_d128_std' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/afifo_w64_d128_std/afifo_w64_d128_std_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'afifo_w64_d128_std' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/afifo_w64_d128_std/afifo_w64_d128_std_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'afifo_w64_d128_std' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/afifo_w64_d128_std/afifo_w64_d128_std_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mac_eth_axi_lite' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/mac_eth_axi_lite/mac_eth_axi_lite.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mac_eth_axi_lite' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/mac_eth_axi_lite/mac_eth_axi_lite_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mac_eth_axi_lite' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/mac_eth_axi_lite/mac_eth_axi_lite_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mac_eth_axi_lite' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/mac_eth_axi_lite/mac_eth_axi_lite_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mac_eth_axi_lite' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/xilinx/genesys2/ip_cores/mac_eth_axi_lite/mac_eth_axi_lite_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'atg_uart_init' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/atg_uart_init/atg_uart_init.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'atg_uart_init' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/atg_uart_init/atg_uart_init_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'atg_uart_init' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/atg_uart_init/atg_uart_init_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'atg_uart_init' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/atg_uart_init/atg_uart_init_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'atg_uart_init' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/atg_uart_init/atg_uart_init_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'uart_16550' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/uart_16550/uart_16550.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'uart_16550' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/uart_16550/uart_16550_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'uart_16550' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/uart_16550/uart_16550_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'uart_16550' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/uart_16550/uart_16550_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'uart_16550' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/io_ctrl/xilinx/genesys2/ip_cores/uart_16550/uart_16550_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mig_7series_0' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/mc/xilinx/genesys2/ip_cores/mig_7series_0/mig_7series_0.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mig_7series_0' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/mc/xilinx/genesys2/ip_cores/mig_7series_0/mig_7series_0_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mig_7series_0' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/mc/xilinx/genesys2/ip_cores/mig_7series_0/mig_7series_0_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mig_7series_0' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/mc/xilinx/genesys2/ip_cores/mig_7series_0/mig_7series_0_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'mig_7series_0' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/mc/xilinx/genesys2/ip_cores/mig_7series_0/mig_7series_0_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_data_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_data_fifo/sd_data_fifo.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_data_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_data_fifo/sd_data_fifo_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_data_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_data_fifo/sd_data_fifo_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_data_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_data_fifo/sd_data_fifo_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_data_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_data_fifo/sd_data_fifo_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_ctrl_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_ctrl_fifo/sd_ctrl_fifo.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_ctrl_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_ctrl_fifo/sd_ctrl_fifo_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_ctrl_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_ctrl_fifo/sd_ctrl_fifo_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_ctrl_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_ctrl_fifo/sd_ctrl_fifo_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_ctrl_fifo' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_ctrl_fifo/sd_ctrl_fifo_sim_netlist.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_cache_bram' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_cache_bram/sd_cache_bram.dcp'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_cache_bram' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_cache_bram/sd_cache_bram_stub.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_cache_bram' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_cache_bram/sd_cache_bram_stub.vhdl'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_cache_bram' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_cache_bram/sd_cache_bram_sim_netlist.v'. Please regenerate to continue.
WARNING: [IP_Flow 19-3664] IP 'sd_cache_bram' generated file not found '/home/shancheng/PITON_ROOT/piton/design/chipset/noc_sd_bridge/xilinx/genesys2/ip_cores/sd_cache_bram/sd_cache_bram_sim_netlist.vhdl'. Please regenerate to continue.
CRITICAL WARNING: [Vivado 12-1462] The source file is already part of the fileset 'sources_1'. Requested source '/home/shancheng/PITON_ROOT/piton/design/common/fpga_bridge/common/xilinx/genesys2/ip_cores/afifo_w64/afifo_w64.xci' will not be added.
CRITICAL WARNING: [Vivado 12-1462] The source file is already part of the fileset 'sources_1'. Requested source '/home/shancheng/PITON_ROOT/piton/design/common/fpga_bridge/fpga_rcv/xilinx/genesys2/ip_cores/afifo_w3/afifo_w3.xci' will not be added.】
so that may be the reason,how can i solve it,thanks
implementation.log
vivado.log

from openpiton.

Did you by any chance change Vivado version while you've been trying to get protosyn to work? I'd suggest deleting build/genesys2 and retrying. If that doesn't work, let me know what files you see under piton/design/chipset/xilinx/genesys2/ip_cores/clk_mmcm for example

from openpiton.

thanks ,the vivado version didn't change ,and I try to run by deleting build/genesys2,but it still can not work ,so the file under piton/design/chipset/xilinx/genesys2/ip_cores/clk_mmcm is as follows：
mmcm_pll_drp_func_us_plus_pll.vh
mmcm_pll_drp_func_us_plus_mmcm.vh
mmcm_pll_drp_func_us_pll.vh
mmcm_pll_drp_func_us_mmcm.vh
mmcm_pll_drp_func_7s_pll.vh
mmcm_pll_drp_func_7s_mmcm.vh
clk_mmcm_ooc.xdc
clk_mmcm_clk_wiz.v
clk_mmcm_board.xdc
clk_mmcm.xml
clk_mmcm.xdc
clk_mmcm.xci
clk_mmcm.veo
clk_mmcm.v

from openpiton.

Hmm ok. Could you try the following: find piton/design/ | grep genesys2/ip_cores | grep "\.xml$" | xargs rm

It looks kind of like Vivado created the synthesis jobs for the mmcm, brams, fifos, etc but then didn't actually run them to successful completion. I've been able to get a bit more success from it in the past when I removed any .xml and .dcp files from the genesys2/ip_cores/ subdirectories before.

Let me know if this helps!

from openpiton.

thanks, I try to remove this xml and .dcp files many times, but it still donsen't work .

from openpiton.

Ok could you give it a try on a clean clone of the repo? Now that you have the other dependencies set up maybe that would help?

It really looks like it doesn't run the synthesis jobs for the IPs. One thing you could also try is to open the genesys2_system.xpr in the Vivado GUI and run synthesis of the IPs as out-of-context jobs yourself.

from openpiton.

thanks, the problem have been found when i open the genesys2_system.xpr in the Vivado GUI. the IP license has expired, so I apply the new license,and the Implementation is passed.

from openpiton.

Ah that's interesting. Good to note for future! I'll close this for now :)

from openpiton.