omaramer01,Omar Amer,github

Hello 👋
I'm Omar Amer. A Cairo university electronics, computer, and communication engineering Graduate. I'm a teaching assistant in Cairo University and a research assistant at the AUC. I'm interested in everything about digital electronics: Design, implementation, and verification.

📌 Pinned Repositories

🤹 Skills

HDL

Scripting

Programming

Omar Amer's Projects

cmps201_2023

This repo has all the material we need for the CMPS201 Microprocessors course. I will add to it each lab.

dcsk

Digital Design and FPGA Implementation of Differential Chaos Shift-Keying Modem

hany-s-revenge

A microprocessors educational game. the player is trapped in an office, they have to defuse the bomb by answering some X86 Assembly and 8086 related questions.

ipyxact

Python-based IP-XACT parser

matching-network-designer

This program designs the matching network parameters for a given load and transmission line.

numerical-analysis

Mathematical tasks and problems solved with python.

popquiz-

A Python Trivia Game.

schem2gds_sar_adc

SAR ADC Digital Control Logic -> 100 MSps and 1.1 GHz system frequency. For CND211

uvm_oc8051_alu

A UVM verification environment for the OpenCores implementation of the Intel 8051 ALU.

vonneumann-risc-processor-cmpn301

The processor in this project has a RISC-like instruction set architecture. There are eight 4-byte general purpose registers; R0, till R7. Another two general purpose registers, One works as a program counter (PC). And the other, works as a stack pointer (SP); and hence; points to the top of the stack. The initial value of SP is (2^32-2). The memory address space is 1 MB of 16-bit width and is word addressable. ( N.B. word = 2 bytes) When an interrupt occurs, the processor finishes the currently fetched instructions (instructions that have already entered the pipeline), then the address of the next instruction (in PC) is saved on top of the stack, and PC is loaded from address 1 of the memory. To return from an interrupt, an RTI instruction loads the PC from the top of stack, and the flow of the program resumes from the instruction after the interrupted instruction.

vp_harvard_mips

A 32-bit microprocessor with 42 instructions (including multiplication and division) and 8 X 32 registers and 2048 X 32 Ram with shared stack. An assembler is also available to write programs on the microprocessor using 8086-like assembly.