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Ravi Nanavati's Projects

bazel_rules_hdl icon bazel_rules_hdl

Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)

bsc icon bsc

Bluespec Compiler (BSC)

bsc-contrib icon bsc-contrib

A place to share libraries and utilities that don't belong in the core bsc repo

geniplate icon geniplate

Use TH to generate uniplate-like functions.

llvm icon llvm

Haskell bindings to the LLVM compiler infrastructure project.

llvm-1 icon llvm-1

Project moved to: https://github.com/llvm/llvm-project

sv2v icon sv2v

SystemVerilog to Verilog conversion

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