Looking for a way to modify the characteristics of flash device about femu HOT 3 CLOSED

It's L. FEMU delay emulation logics already counts in all the software overhead, including I/O emulation + DRAM access. If you set them to a very small value (e.g. less than the software overhead itself), you won't get accurate latency emulation.

from femu.

Yes, you can use the following methods:

(1). In hw/block/femu/femu-oc.c, line 78-83 defines the default latency numbers for page read/program and block erase, profiled from our CNEX OCSSD. You can modify them directly and recompile FEMU.

(2). A more convenient way requires no femu code change. FEMU already defines a NVMe command (opcode: 0xee) for you to change the latency characteristics in flight. In guest OS, you can use the admin-passthru subcommand provided by nvme-cli tool, for example,

$ sudo nvme admin-passthru -d /dev/nvme0n1 --opcode=0xee --cdw10=100000 --cdw11=60000 --cdw12=3000000 --cdw13=1000000 --cdw14=7000000 --cdw15=60000

Where:

• cdw10=100000; set NAND upper page read latency to 100us
• cdw11=60000; set NAND lower page read latency to 60us
• cdw12=3000000; set NAND upper page program latency to 3ms
• cdw13=1000000; set NAND lower page program latency to 1ms
• cdw14=7000000; set NAND block erase time to 7ms
• cdw15=60000; set page channel transfer time to 60us (correspondingly, the channel bandwidth is: 1s / 60us * 16KB = 260MB/s); 16KB is the page size.

You can set all of them to 0 to disable latency emulation when you want to warmup the emulated SSD faster. And restore the latency emulation when running your real workload.

Hope this helps.

from femu.

@huaicheng Thanks for your help.
BTW, if I set those values into a pretty low point, should I consider the latency of DRAM?
For example, if I set the read latency to L, is the actual latency L or L+Ldram?

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