Property 'femu.cell_type' not found about femu HOT 4 CLOSED

static inline uint8_t get_page_type(int flash_type, int pg)
{
    static bool first_in=0;
    if(first_in==0){
        int i, j;
        int rows = (MAX_SUPPORTED_PAGES_PER_BLOCK + 5) / 6;
        int lpflag = TLC_LOWER_PAGE;
        int page_per_row=6;

        int lowp[] = {0, 1, 2, 3, 4, 5};
        int centerp[] = {6, 7};

        for (i = 0; i < sizeof(lowp)/sizeof(lowp[0]); i++)
            tlc_tbl[lowp[i]] = TLC_LOWER_PAGE;

        for (i = 0; i < sizeof(centerp)/sizeof(centerp[0]); i++)
            tlc_tbl[centerp[i]] = TLC_CENTER_PAGE;

        for (i = 0; i < rows - 2; i++) {
            for(j = 0; j < page_per_row; j += 2) {
                int idx = 8 + (i * page_per_row) + j;
                tlc_tbl[idx] = tlc_tbl[idx+1] = lpflag;
                lpflag = (lpflag == TLC_UPPER_PAGE) ? TLC_LOWER_PAGE : lpflag + 1;
            }
        }
        first_in=1;
    }
   
    switch (flash_type) {
    case SLC:
        return slc_tbl[pg];
    case MLC:
        return mlc_tbl[pg];
    case TLC:
        //printf("tlc_tblget_page地址=%p\n",tlc_tbl);
        return tlc_tbl[pg];
    case QLC:
        return qlc_tbl[pg];
    default:
        abort();
    }
}

static inline int64_t get_page_read_latency(int flash_type, int page_type)
{
    static bool get_page_read_latency_first_in=0;
    
    if(get_page_read_latency_first_in==0){
            nand_flash_timing = (NandFlashTiming) {
        /* From low pages to high/upper pages */

        /* Nand Page Read */
        .pg_rd_lat[SLC] = {
            [SLC_PAGE] = SLC_PAGE_READ_LATENCY_NS,
        },
        .pg_rd_lat[MLC] = {
            [MLC_LOWER_PAGE] = MLC_LOWER_PAGE_READ_LATENCY_NS,
            [MLC_UPPER_PAGE] = MLC_UPPER_PAGE_READ_LATENCY_NS
        },
        .pg_rd_lat[TLC] = {
            [TLC_LOWER_PAGE]  = TLC_LOWER_PAGE_READ_LATENCY_NS,
            [TLC_CENTER_PAGE] = TLC_CENTER_PAGE_READ_LATENCY_NS,
            [TLC_UPPER_PAGE]  = TLC_UPPER_PAGE_READ_LATENCY_NS,
        },
        .pg_rd_lat[QLC] = {
            [QLC_LOWER_PAGE]        = QLC_LOWER_PAGE_READ_LATENCY_NS,
            [QLC_LOWER_CENTER_PAGE] = QLC_CENTER_LOWER_PAGE_READ_LATENCY_NS,
            [QLC_UPPER_CENTER_PAGE] = QLC_CENTER_UPPER_PAGE_READ_LATENCY_NS,
            [QLC_UPPER_PAGE]        = QLC_UPPER_PAGE_READ_LATENCY_NS,
        },

        /* Nand Page Write */
        .pg_wr_lat[SLC] = {
            [SLC_PAGE] = SLC_PAGE_WRITE_LATENCY_NS,
        },
        .pg_wr_lat[MLC] = {
            [MLC_LOWER_PAGE] = MLC_LOWER_PAGE_WRITE_LATENCY_NS,
            [MLC_UPPER_PAGE] = MLC_UPPER_PAGE_WRITE_LATENCY_NS
        },
        .pg_wr_lat[TLC] = {
            [TLC_LOWER_PAGE]  = TLC_LOWER_PAGE_WRITE_LATENCY_NS,
            [TLC_CENTER_PAGE] = TLC_CENTER_PAGE_WRITE_LATENCY_NS,
            [TLC_UPPER_PAGE]  = TLC_UPPER_PAGE_WRITE_LATENCY_NS,
        },
        .pg_wr_lat[QLC] = {
            [QLC_LOWER_PAGE]        = QLC_LOWER_PAGE_WRITE_LATENCY_NS,
            [QLC_LOWER_CENTER_PAGE] = QLC_CENTER_LOWER_PAGE_WRITE_LATENCY_NS,
            [QLC_UPPER_CENTER_PAGE] = QLC_CENTER_UPPER_PAGE_WRITE_LATENCY_NS,
            [QLC_UPPER_PAGE]        = QLC_UPPER_PAGE_WRITE_LATENCY_NS,
        },

        /* Nand Block Erase */
        .blk_er_lat = {
            [SLC] = SLC_BLOCK_ERASE_LATENCY_NS,
            [MLC] = MLC_BLOCK_ERASE_LATENCY_NS,
            [TLC] = TLC_BLOCK_ERASE_LATENCY_NS,
            [QLC] = QLC_BLOCK_ERASE_LATENCY_NS,
        },

        /* Nand Page Channel Transfer */
        .chnl_pg_xfer_lat = {
            [SLC] = SLC_CHNL_PAGE_TRANSFER_LATENCY_NS,
            [MLC] = MLC_CHNL_PAGE_TRANSFER_LATENCY_NS,
            [TLC] = TLC_CHNL_PAGE_TRANSFER_LATENCY_NS,
            [QLC] = QLC_CHNL_PAGE_TRANSFER_LATENCY_NS,
        },
    };
    get_page_read_latency_first_in=1;
    }

    return nand_flash_timing.pg_rd_lat[flash_type][page_type];
}