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atp-engine

conan-center-index

Recipes for the ConanCenter repository

conan-recipes

A bunch of conan recipes to package C++ libraries

coredsl

Xtext project to parse CoreDSL files

crave

Constrained RAndom Verification Enviroment (CRAVE)

dbt-rise-core

DBT-RISE - A versatile Dynamic Binary Translation (DBT) based environment to implement instruction set simulator (ISS)

dbt-rise-riscv

An instruction set simulator based on DBT-RISE implementing the RISC-V ISA

dbt-rise-unicorn

A dbt-rise bidning for the unicorn engine (https://www.unicorn-engine.org/)

eclipse-jarinjarloader

A custom classloader to be used from maven generated artifacts to allow executable jars and custom exclusion of some libraries at runtime (eg. swt libraries). Based on code and packing strategy from eclipse.

fc4sc

A header only C++11 library for functional coverage

fc4sc-accellera

Functional Coverage for SystemC (FC4SC) library which provides mechanisms for functional coverage definition, collection and reporting.

freertos-riscv

Official FreeRTOS release with RISC-V port providing blinky example for RISCV-VP

gdbwave

GDB server to debug CPU simulation waveform traces

hifive1-vp

A Virtual platform using DBT-RISE-RISCV capable of running unmodified FreeRTOS

lwtr4sc

Lightweight transaction recording for SystemC

mendel-sbml

Mendel© SBML Editor

minres.github.io

Source of https://minres.github.io/

mlonmcu

Tool for the deployment and analysis of TinyML applications on TFLM and MicroTVM backends

mlonmcu-sw

Target software library (MLIF, Machine Learning Interface) used by the MLonMCU python package

naxriscv

peakrdl-svd

Import and export CMSIS-SVD register models

proteus

The SpinalHDL design of the Proteus core, an extensible RISC-V core.

pysysc

Public repository for the SC Common Practices Subgroup

pyucis

Python API to Unified Coverage Interoperability Standard (UCIS) Data

pyucis-viewer

QT-based viewer for UCIS coverage data

rdl-editor

A Xtext based SystemRDL editor with syntax highlighting and context sensitive help

riscv-arch-test

riscv-opcodes

RISC-V Opcodes

riscv_isa_coredsl

CoreDSL descriptions of the RISC-V ISA

scviewer

Online documentation can be found at https://minres.github.io/SCViewer/