Code for an mbed microcontroller that runs march SS tests on embedded SRAM on a test chip through the JTAG interface. The custom test chip is for VarExp board version Red Mini Cooper.

dpcs-sram-fault-test-post-process

MATLAB processing scripts for data generated by the code in the SRAM-fault-tests/ project.

dpcs-sram-noisemargin-analysis

MATLAB code to postprocess SRAM SPICE data for noise margins with process variability

eccgrp-data-stats

Some MATLAB code for computing data transitions in a memory trace

eccgrp-periodic-file-dumper

Shell code for periodically dumping contents of a file

fault-tolerant-spm

fault tolerant scratchpad

performability-matlab-models

MATLAB code that implements performability models (theoretical app performance in presence of corrected memory errors)

rooflining-util

Simple Python and Jupyter utilities for analytical rooflining studies

sdecc-gem5-stable-50ff05095970

Branch of a specific gem5 commit used for RISC-V stuff and memory content tracing extensions for the SDECC project

sdecc-penaltybox-rtl

Verilog RTL for the Software-Defined ECC (SDECC) Penalty Box

sdecc-viffto-alpha-isa-decoder

C++ implementation of the Alpha ISA decoder based on hacked code from gem5. Used for SDECC and ViFFTo projects

sdecc-viffto-app-demo

Hello World example program for interacting with the SDELC embedded C library for implementing application-defined memory DUE handlers

sdecc-viffto-ecc-ctrl

Primary development repository for all ECC encoding, decoding, heuristic recovery, etc. for SDECC and ViFFTo/SDELC projects

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