Comments (4)
Something seems to be wrong here... if I change NTSC/PAL with freezer, then do clr ti, I always end up with 193 in DD0E. This seems to be wrong. Tested with development head and 920385.
Edit: and I know that TOD50 does work, as I discovered the problem while working on RTC tick detection in freezer...
from mega65-core.
And it's 50Hz vs. 60Hz, which means if you have the wrong TOD50 setting you should be loosing a just over a second every ten seconds (this is what I was seeing in my 14 sec RTC tick test).
from mega65-core.
In freezer TOD50 is manipulated correctly. The freezer switch function also manipulates frozen memory... but when I exit freezer, the restored system again has the old settings... but CIAs are saved to frozen memory, so it should be possible to manipulate them.
What confuses me is that ROM seems to set CIA1 and CIA2 TOD50 differently. Or is CIA1 not used as a timer and because of this the flag has no meaning?
from mega65-core.
I only see references to CIA2 in the ROM code for TI, I don't know why.
from mega65-core.
Related Issues (20)
- MEGA65 R7 Change Request Marshalling Point HOT 4
- A few modern C64 carts not detected as C64 carts by core selector HOT 50
- MEGAFLASH: refactor low level flashing interface HOT 1
- MEGAFLASH: Slot 0 flashing might still leave system broken HOT 3
- Etherload run&continue mode
- HYPERRAM: production_test fails with release-0.96 candidate HOT 4
- Hardware math division: 5211/193 > 27 HOT 2
- CONFIGURE: MAC address typed in is not correctly mangled HOT 4
- CONFIGURE: POWER-CYCLE screen has color issue on VGA only HOT 8
- RRB sprite number count limited because of colour ram wrap-around. HOT 6
- RTS immediate mode instruction completely broken HOT 1
- rel-build: various changes and enhancements
- Direct drive audio DAC has unusual stepwise behaviors in a test case HOT 2
- Enhanced DMA Byte Munging Options HOT 2
- RRB Reverse Y-row adjust HOT 2
- Set GotoX Rowmask changes colour palette in use for rendering
- Allow connection of cellular modem to Nexys4 PSRAM
- R3/R3A Cannot boot if amplifier I2C is faulty HOT 1
- SDRAM controller intermittant problems HOT 28
- Background D020 updates late after raster interrupt? HOT 1
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