Comments (2)
Related, splitting the declaration from its rwprobe creation:
FIRRTL version 4.0.0
circuit L:
layer T, bind:
public module L:
output p : RWProbe<UInt<1>, T>
wire w : UInt<1>
connect w, UInt<1>(0)
layerblock T:
define p = rwprobe(w)
Produces:
layers-rwprobe-2.fir:12:18: error: 'firrtl.ref.rwprobe' op has non-local target
define p = rwprobe(w)
^
layers-rwprobe-2.fir:12:18: note: see current operation: %0 = "firrtl.ref.rwprobe"() {target = #hw.innerNameRef<@L::@sym>} : () -> !firrtl.rwprobe<uint<1>>
// -----// IR Dump After LowerLayers Failed (firrtl-lower-layers) //----- //
"firrtl.circuit"() ({
"sv.verbatim"() {format_string = "`ifndef layers_L_T\0A`define layers_L_T", output_file = #hw.output_file<"layers_L_T.sv", excludeFromFileList>, symbols = []} : () -> ()
"firrtl.module"() ({
^bb0(%arg1: !firrtl.rwprobe<uint<1>>):
%3 = "firrtl.ref.rwprobe"() {target = #hw.innerNameRef<@L::@sym>} : () -> !firrtl.rwprobe<uint<1>>
"firrtl.ref.define"(%arg1, %3) : (!firrtl.rwprobe<uint<1>>, !firrtl.rwprobe<uint<1>>) -> ()
}) {annotations = [], convention = #firrtl<convention internal>, layers = [], portAnnotations = [], portDirections = array<i1: true>, portLocations = [loc(unknown)], portNames = ["p"], portSyms = [], portTypes = [!firrtl.rwprobe<uint<1>>], sym_name = "L_T", sym_visibility = "private"} : () -> ()
"firrtl.module"() ({
^bb0(%arg0: !firrtl.rwprobe<uint<1>>):
%0 = "firrtl.wire"() {annotations = [], inner_sym = #hw<innerSym@sym>, name = "w", nameKind = #firrtl<name_kind droppable_name>} : () -> !firrtl.uint<1>
%1 = "firrtl.constant"() {value = 0 : ui1} : () -> !firrtl.uint<1>
"firrtl.matchingconnect"(%0, %1) : (!firrtl.uint<1>, !firrtl.uint<1>) -> ()
%2 = "firrtl.instance"() {annotations = [], layers = [], lowerToBind, moduleName = @L_T, name = "t", nameKind = #firrtl<name_kind droppable_name>, output_file = #hw.output_file<"layers_L_T.sv", excludeFromFileList>, portAnnotations = [[]], portDirections = array<i1: true>, portNames = ["p"]} : () -> !firrtl.rwprobe<uint<1>>
"firrtl.ref.define"(%arg0, %2) : (!firrtl.rwprobe<uint<1>>, !firrtl.rwprobe<uint<1>>) -> ()
}) {annotations = [], convention = #firrtl<convention scalarized>, layers = [], portAnnotations = [[]], portDirections = array<i1: true>, portLocations = [loc("layers-rwprobe-2.fir":7:12)], portNames = ["p"], portSyms = [], portTypes = [!firrtl.rwprobe<uint<1>>], sym_name = "L"} : () -> ()
"sv.verbatim"() {format_string = "`endif // layers_L_T", output_file = #hw.output_file<"layers_L_T.sv", excludeFromFileList>, symbols = []} : () -> ()
}) {annotations = [], name = "L"} : () -> ()
This one's trickier.
It's not possible to always sink the rwprobe target into the layer (could have other users, or target a port).
from circt.
Second example as written I think should be rejected -- Layers shouldn't have access to write targets outside the layer. This is handled by #7372 .
So I believe that PR as well as #7369 (teaching LowerLayers to support this when it is possible -- target is within the same layer) will resolve this.
from circt.
Related Issues (20)
- [FIRRTL][Layers] ref.send is rejected but is always passive capture HOT 2
- [FIRRTL][LowerSignatures] Const is dropped, breaking IR HOT 1
- Crash in circt-verilog: Assertion `succeeded(result) && "expected ConstantLike op to be foldable"' failed. HOT 3
- circt-verilog: failed to legalize operation 'moore.variable' HOT 5
- [Verif][Sim][Feature] Inline Simulation Tests
- [Moore] Redesign `wait_event` operation
- [Moore] Mem2Reg Error
- [ExportVerilog] Pass should fail if any failure occurs while running HOT 3
- [FIRRTL] Tighten Layerblock Checking of Writes Outside the Layerblock
- [FIRRTL][LowerLayers] ref.send capture of non-passive doesn't work
- [FIRRTL] `SpecializeLayers` not removing all nested layers
- [Moore] Input triggers assertion in canonicalizer infra HOT 7
- [FIRRTL] design with layers not optimized as well as without HOT 1
- [MooreToCore] VariableOp lowered failed HOT 10
- [FIRRTL] Blackboxes, Directories, and Layers not working as expected
- [FIRTOOL] Verification layers are not included in filelist.f HOT 5
- [Scheduling] Add interfaces to allow removal of problem components and properties
- [Scheduling] Add interface to manage solutions
- [Scheduling] Allow cloning of problem instances
- [FIRRTL] Poor Asymptotic Performance of Layer Merge and Layer Sink
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from circt.