Name: Mohammad Khalique Khan
Type: User
Company: https://github.com/Cadence
Bio: Khalique is Application Engineer at Cadence Design Systems, completed Bachelor of Technology in ECE, he is focused on Microelectronics and VLSI.
Twitter: abd_al_khalique
Location: Noida
Mohammad Khalique Khan's Projects
Design of 6T SRAM Cell using SkyWater 130nm technology.
https://caravel-user-project.readthedocs.io
This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral RTL of an 8-bit Priority Encoder, using SkyWater 130 nm PDK.
Digital Design on FPGA VSDOpen21 Workshop
A robot powered training repository :robot:
Magic VLSI Layout Tool
On-Chip Clock Multiplier (PLL) on OSU180 Workshop
Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
GitHub is the new Resume for VLSI industry GitHub is indeed the new RESUME for VLSI industry. Really, if you are recruiting person and looking forward to judge a new candidate for a role in company, ask for GitHub project link. Projects written on resume and projects available on GitHub by a candidate will immediately give you an idea about his/her perseverance, dedication, sincerity, productivity and amount of hard-work he/she can put inside a project.
VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW takes control, RTL is synthesized (using Yosys). The synthesized netlist is given to PNR tool (Qflow) and finally Sign-off is done with STA tool (using Opentimer). The output of the flow is GDSII layout and performance & area metrics of your design. VSDFLOW also provide hooks at all stages for users working at different levels of design flow. It is tested for 30k instance count design like ARM Cortex-M0, and can be further tested for multi-million instance count using hierarchical or glue logic.