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Kaan Olgu

Hi, I’m @kaanolgu
🎓  I'm currently PhD student in Electrical & Electronics Engineering at the University of Bristol.
💡  I like to explore new technologies and develop software solutions and quick hacks for heterogeneous computing with FPGAs.
💬  Feel free to reach out to me for research related questions or just for some interesting discussion.
✉️  You can shoot me an email at [email protected]! I'll try to respond as soon as I can.\

🛠  Tech Stack

Vitis 2021.1  SDK 2018.2 

Top Langs

ORCiD

0000-0003-0351-2055
My research profile link

kaanolgu's Projects

babelstream icon babelstream

Modifying SYCL implementation to make it icpx compatible

bfs-sycl-fpga icon bfs-sycl-fpga

The Breadth-First Search algorithm implementation using Intel oneAPI (SYCL2020) on Intel Stratix10 FPGAs

ramble icon ramble

A multi-platform experimentation framework written in python.

spack icon spack

A flexible package manager that supports multiple versions, configurations, platforms, and compilers.

sparse-bfs-fpga icon sparse-bfs-fpga

The source files for the Sparse BFS used for Zedboard Implementation

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