Comments (3)
Hi! Thanks for a quick fix :) Now everything seems to work correctly!
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Hi @m4drat !
It seems the issue comes from the fact that the instruction is decoded differently by Capstone depending on the mode. In ARM mode, it includes the pc
among its operands (this is where the comment you pointed out comes from) while in Thumb mode it doesn't, as shown below:
$ cstool -d thumb "08 A0" # ADR R0, 0x20
0 08 a0 adr r0, #0x20
ID: 4 (adr)
op_count: 2
operands[0].type: REG = r0
operands[0].access: WRITE
operands[1].type: IMM = 0x20
Registers modified: r0
Groups: thumb thumb1only
$ cstool -d arm "20 00 8F E2" # ADR R0, 0x20
0 20 00 8f e2 add r0, pc, #0x20
ID: 2 (add)
op_count: 3
operands[0].type: REG = r0
operands[0].access: WRITE
operands[1].type: REG = pc
operands[1].access: READ
operands[2].type: IMM = 0x20
Registers read: pc
Registers modified: r0
Groups: arm
I will update the semantics (function adr_s
) to fix the behavior when in Thumb mode.
This issue does not seem to affect the instruction for the ARM64
arch.
from triton.
Hi @m4drat ! I fixed this issue in the following PR: #1300.
Could you confirm it fixes the issue?
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