How to passed your testbench without any UVM_ERROR? about processor-uvm-verification HOT 7 OPEN

run.log

from processor-uvm-verification.

Looks like the code of the DUT has a missing file which is causing this issue. I do not have any backups for this project and we would need development of the Hazard Unit Controller again.
If case you or someone else reading this on the internet looking for a small fun Verilog development project, is interested please consider forking this repo and developing the Hazard Unit referring to the documentation for the same. I can help with guidance on how this should be done.

from processor-uvm-verification.

Hi gupta409，

I found your paper on google, and I think your idea of using python script to help development is great, so I want to refer to your python script. I found that the python script is not included on github, Could you share it please!

Regards,
gengfei

from processor-uvm-verification.

from processor-uvm-verification.

Hi Gupta,

Thank you very much for your reply. The link to the paper is as follows:
https://webthesis.biblio.polito.it/18053/1/tesi.pdf

I would like to refer to two places of your paper:
ISA Database and RV Generator: If you want to refer to your ISA generation part, some ISAs are already included in your paper. If you need to extend the ISA, you can refer to the generated ISA part to quickly add your own extended ISA .Could you share the .py,.sv,*.csv files in the "ISA Database" and "RV Generator" chapters.

UVM Env Configurator:You use the interface to configure the simulation and present the simulation results, which is very cool, so I really want to refer to your GUI script.

In addition, some picture information of processor_scoreboard.sv is also given in your paper. By printing the information, it can be seen that the number of lines in the "processor_scoreboard.sv" file is very large, more than 1331 lines, which is much larger than the current "processor_scoreboard.scoreboard. sv", so if you have a backup, could you update this file as well, thank you very much!

Regards,
gengfei

from processor-uvm-verification.

Hi gengfei,

The paper you mention only uses this repository as a reference. It is not associated with this particular repository.
I would recommend you try to get in touch with the author of the paper you are looking at.

Thanks,
Anish

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from processor-uvm-verification.