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Collection of open source ASIC projects targeting GFMPW-1 initially
SKY130 Folded Cascode OpAmp integrated into Caravel
Caravel user project built around 1kB OpenRAM macro and simple HyperRAM driver to provide more memory to Caravel SoC.
Wishbone connected HyperRAM controller for GF180
Bringup FW for GF180 MPW0 HyperRAM
Test PCB for CARAVEL ASIC with HyperRAM memory (S27KL0641)
Test PCB for CARAVEL ASIC in QFP package with HyperRAM memory (S27KL0641)
Simple PCB to connect HyperRAM memories to Cyclone V SoC Development Kit via HSMC connector
Project 1.2 Draw a MOSFET with Magic
tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
Monte Carlo simulation of simple inverter in SKY130
Wishbone connected HyperRAM controller for Skywater 130
Operational amplifier for Skywater 130nm
ICE40 Frequency counter with SSD1306 based OLED LCD
CPP driver example for GPIO (STM32CubeIDE, STM32F7 family)
Syzygy Pod PCB with HyperRAM and HyperFlash memories
Simple Frequency Counter with SSD1306 based OLED for Tiny Tapeout 8
Simple Wishbone bridge for splitting incoming transactions into few buses based on address
Consists gate level simulation result for hardened wrapped_wb_hyperram project.
Hardening openram 1kB for sky130
Tiny wrapper for OpenRAM memory block, connected to Wishbone bus
Tiny Wishbone MUX for two memory blocks (OpenRAM + HyperRAM)
Wrapped version of Wishbone OpenRam Shim/Wrapper for MPW group submission in ZeroToASIC course
Clone this inside the Efabless caravel_board repo
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Open source projects and samples from Microsoft.
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Data-Driven Documents codes.
China tencent open source team.