Hi! Dev here 👋

I am an individual with a strong technical foundation in Digital Electronics and VLSI design. I have a keen interest in RISC V, FPGAs & ASIC Design and Verification, with an experience in Verilog HDL and programming. I am open to working in different areas and doing specific tasks related to what I am studying. I am eager to contribute my skills and knowledge to the team and gain practical experience. I have excellent communication skills and a strong desire to learn and grow, making me an asset to any team..

😎 Selected for the Linux Foundation's Spring 2023 Mentorship Program under RISC-V International.
🌱 Currently learning: Advanced Digital Design
📫 How to reach me: [email protected]

🌐 Connect with Me

📈 GitHub Stats & Streaks

Dev Chadha's Projects

100-days-of-rtl

I started off to work on RTL Design for 100 days. Falling short with problems so decided to go ahead solving problems on HDLBits. Would continue here once I start my verification journey.

dsp-lab-ecs-611

Dropping DSP Lab Stuff here

fir-and-iir-using-verilog-and-hls

This repository carries the design of FIR and IIR based Low Pass Filter, designed using Verilog and HLS

gem5

The official repository for the gem5 computer-system architecture simulator.

hdl-bits-solutions

Adding solutions of problems I have solved so far on HDLBits. Hope this helps :-)

implementation-of-quantum-key-distribution-protocol-bb84-on-fpga

This project presents the implementation of Quantum Key Distribution (QKD) Protocol:BB84 on FPGA. Quantum Communication Methodology has been designed using cryptographic protocol along with parallel processing power of FPGAs. The multiple module hierarchy has been used to ease the realization of Algorithm. Details in README file