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c2bc

eloquent javascript exercises

comp3500

cpudesingproject

elec-3050

This repository stores projects I completed in elec 3050 Embedded Systems Design Lab in Spring 2019 at Auburn University which was a join effort with electrical engineering students.

elec-5200-computer-architecture-cpu-design

This is a repository containing the Verilog CPU Design files for the working processor I designed in Elec 5200. using the Verilog Hardware Description Language

elec-5260-embedded-systems-design

This is a repository for the various projcts I completed while taking an elective course on embedded systems during the summer of 2018 at Auburn University

foxhole-

foxholeacres

tools for the business

fpga

This is a combination of verilog and vhdl files from self-taught projects made during my time working in a cyber research lab in Auburn and also projects from coursework in Digital System Design ELEC 4200. The projects were made using an Embedded Micro mojo FPGA, a Zynq 7 zedboard, or a Digitlent Nexys 4 development board.

fpga_old

Verilog Code

groupmebot

senior_design

Files related to tracking radar senior design project during undergraduate at Auburn University

stepper

Stepper Library for Arduino

xbsv

connectal (formerly called xbsv) contains a utility to generate bit files for Xilinx Zynq devices from BSV programs.