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swatanabe avatar swatanabe commented on July 26, 2024

AMDG

On 10/19/2014 08:36 PM, Nenad Vukicevic wrote:

I took a look at this and created an example code:

shared int aint;
int main ()
{
  aint = 2;
}

and IR looks like this (-O0 -S -emit-llvm)

define i32 @upc_main() #0 {                                                     
entry: 
store i32 2, i32 addrspace(16)* inttoptr (i64 shl (i64 ptrtoint (i32* @aint to i64), i64 20) to i32 addrspace(16)*), align 4
ret i32 0
}

I don't know at what point this IR is being printed, but I don't see any OR instruction for thread and address. In packed version I can clearly see the OR instruction.

Based on running tests I can see that test failes from time to time as barrier is failing (it has some shared stores and atomic operations).

I doubt this is the problem. The thread is zero
which causes the or to be folded. The packed
version is too complex for the trivial constant
folding that happens with -O0.

In Christ,
Steven Watanabe

from llvm-upc.

swatanabe avatar swatanabe commented on July 26, 2024

AMDG

On 10/19/2014 08:36 PM, Nenad Vukicevic wrote:

Based on running tests I can see that test failes from time to time as barrier is failing (it has some shared stores and atomic operations).

It appears that upc_wait is returning too soon.

In Christ,
Steven Watanabe

from llvm-upc.

nenadv avatar nenadv commented on July 26, 2024

Fixed by clangupc/clang-upc@8c2f224

from llvm-upc.

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