chappie19 Goto Github PK

algorithmic-sar-adc-simulation-files

HSPICE and MATLAB simulation files of a tracking SAR ADC

ali-loner.github.io

Ali-loner的个人主页

analog-design-of-asynchronous-sar-adc

This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) implemented in 45nm CMOS technology.

chappie19.github.io

csatool

Repository of the CSAtool

delta_sigma_pipe_lascas_2020

This is the code that generated the graphs for the paper and presentation of lascas 2020 paper "A blind calibration scheme for switched-capacitor pipeline analog-to-digital converters"

digital-calibration-of-sar-adc

Successive Approximation Register (SAR) ADC Digital Calibration (in Matlab)

dsp

DSP, ADC and WCN Labs MATLAB files

html5

ic_design

love

openserdes

Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.

python-deltasigma

A port of the MATLAB Delta Sigma Toolbox based on free software and very little sleep

rsdeltasigmaport.jl

Port of Richard Schreier's Delta Sigma Toolbox

rtl-to-gds-implementation-of-32-bit-serdes

serdes

Verilog RTL Design

sigma-delta-adc

simulink

simulink 仿真以及代码生成入门精通 源代码

single-stage-cmos-amplifier-and-switched-capacitor-sample-hold-circuit

springerdownloader

新冠期间，Springer Nature为教育界和学术界人士免费提供基础教科书的分类下载器

sw_cap_design_tool

Python port of Seeman's MATLAB switched capacitor design toolbox

ustcthesis