Comments (6)
Comment by RobertBaruch
Sunday Oct 13, 2019 at 18:09 GMT
Apparently when the two clocks need to change at the same time (here, at 7.5us), at timestamp 7.5, the scheduled events are at 7.5 and 10, with a delta of 1e-10. Since 7.5-min(7.5, 10)=0 <= 1e-10, a DeadlineError
is raised.
You probably already know this :)
$ python3 simclk.py
step
curr_dirty any
wait_deadline {}, ts 0.0, delta 0.0
step
processes > suspended
step
processes > suspended
step
run passive
step
curr_dirty any
wait_deadline {<generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd295c8>: 2.5, <generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd29620>: 3.0}, ts 1.5, delta 1e-10
wait_deadline.values dict_values([2.5, 3.0])
step
run passive
step
curr_dirty any
wait_deadline {<generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd29620>: 3.0, <generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd295c8>: 5.0}, ts 2.5, delta 1e-10
wait_deadline.values dict_values([3.0, 5.0])
step
run passive
step
curr_dirty any
wait_deadline {<generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd295c8>: 5.0, <generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd29620>: 4.5}, ts 3.0, delta 0.0
wait_deadline.values dict_values([5.0, 4.5])
step
run passive
step
curr_dirty any
wait_deadline {<generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd295c8>: 5.0, <generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd29620>: 6.0}, ts 4.5, delta 1e-10
wait_deadline.values dict_values([5.0, 6.0])
step
run passive
step
curr_dirty any
wait_deadline {<generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd29620>: 6.0, <generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd295c8>: 7.5}, ts 5.0, delta 0.0
wait_deadline.values dict_values([6.0, 7.5])
step
run passive
step
curr_dirty any
wait_deadline {<generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd295c8>: 7.5, <generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd29620>: 7.5}, ts 6.0, delta 0.0
wait_deadline.values dict_values([7.5, 7.5])
step
run passive
step
curr_dirty any
wait_deadline {<generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd29620>: 7.5, <generator object Simulator.add_clock.<locals>.clk_process at 0x7f447bd295c8>: 10.0}, ts 7.5, delta 1e-10
wait_deadline.values dict_values([7.5, 10.0])
Traceback (most recent call last):
File "simclk.py", line 11, in <module>
sim.run_until(100, run_passive=True)
File "/home/robertbaruch/.local/lib/python3.6/site-packages/nmigen/back/pysim.py", line 854, in run_until
if not self.step(run_passive):
File "/home/robertbaruch/.local/lib/python3.6/site-packages/nmigen/back/pysim.py", line 810, in step
raise DeadlineError("Delta cycles exceeded process deadline; combinatorial loop?")
nmigen.back.pysim.DeadlineError: Delta cycles exceeded process deadline; combinatorial loop?
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Comment by whitequark
Sunday Oct 13, 2019 at 18:10 GMT
You probably already know this :)
I actually did not have a chance to look into this. Do you happen to have a patch?
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Comment by RobertBaruch
Sunday Oct 13, 2019 at 18:11 GMT
No, I just noted the immediate cause of the error, not the root cause, since I have no idea how the simulator works. Still looking into that.
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Comment by RobertBaruch
Sunday Oct 13, 2019 at 18:48 GMT
I just removed the check. I know nothing about how the simulator works, but the comment mentions logic loops. These clocks seem to be implemented as two processes with no inputs, so maybe the check should be done minus any processes which are clocks?
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Comment by whitequark
Sunday Oct 13, 2019 at 18:57 GMT
Mm, not sure, sorry. I don't remember much about the simulator, and I've focused most of my mental effort on a future complete redesign.
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Comment by RobertBaruch
Sunday Oct 13, 2019 at 19:03 GMT
In any case, even with that change, it doesn't seem like anything associated with the negative edge of the clock changes in the simulator (see #236), so now there are two problems :)
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Related Issues (20)
- Indexing into signals with layouts could be improved HOT 1
- `AttributeError` caused by `UnusedElaboratable` after an elaboratable has failed its initialization HOT 1
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- Views with an array layout should have `len()` applicable to them
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- Improve diagnostics on module.domain/module.domains mixup HOT 1
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