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šŸ’« Aidan McNay

Hi! I'm a M.Eng student at Cornell University studying Electrical and Computer Engineering
Strengths include Digital RTL design and testing, as well as automating work around me.

Feel free to reach out - always willing to learn more and get involved!

  • šŸ”­ Iā€™m currently an incoming M.Eng student at Cornell University studying Electrical and Computer Engineering, focusing on Computer Architecture
  • šŸŒ± Iā€™m currently learning Rust and Go
  • šŸ’¬ Ask me about computer engineering (from RTL to VLSI)
  • šŸ“« How to reach me: The best way is probably email
  • šŸ˜„ Pronouns: he/him
  • āš” Fun fact: I can juggle clubs!

šŸŒ Socials:

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šŸ’» Tech Stack:

Altium Bash C++ C LaTeX OCaml Python Qt CMake Canva Gimp Gnu Image Manipulation Program Inkscape Verilog/SystemVerilog

šŸ“Š GitHub Stats:



šŸ† GitHub Trophies

āœļø Random Dev Quote

Aidan McNay's Projects

bogue icon bogue

A quick fix for Bogue so that it doesn't segfault on MacOS

cv32e40x icon cv32e40x

4 stage, in-order, compute RISC-V core based on the CV32E40P

jennie icon jennie

A Slack bot for the Cornell Chimes, written in Python using the Bolt SDK

jeopardy icon jeopardy

A Jeopardy GUI for creating and running games, implemented in Go

riscv-steel-core icon riscv-steel-core

Processor core implementing the base RV32I instruction set of the RISC-V ISA

rsa-xcel icon rsa-xcel

Hardware accelerators for RSA encryption/decryption

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