Comments (5)
I've just rented an M2 machine in the cloud for a month, and I see the same thing. My money would be on "minor architectural difference"...
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Some of the changes seem to be:
extrh
,extrv
,vecfp
,matfp
,genlut
gaining bf16 modes (the CPU cores also gain BF16 support in M2)extrh
andextrv
gaining some f32 -> f16 (or bf16) mixed lane-width modesldx
andldy
gaining "load four at a time" modeextrh
,extrv
,vecint
,vecfp
gaining support for operating on two or four vectors in a single instruction, rather than just a single vectorvecint
andvecfp
gaining some new ALU modes (albeit not particularly interesting modes, e.g.z = x * y
,z = z + x
,z = z + y
)
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Commits pushed to reflect the changes in the above comment, in both the documentation and the emulation code.
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Ok cool, I'll explore a bit and let you know if I find anything!
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Add SIMD comment
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