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Name: Chandan Iswar Palai
Type: User
Bio: Hi, I am passionate about hardware design and coding. I'm self trained in many languages and have had professional training in VHDL & Verilog
Location: Pune
Name: Chandan Iswar Palai
Type: User
Bio: Hi, I am passionate about hardware design and coding. I'm self trained in many languages and have had professional training in VHDL & Verilog
Location: Pune
AES implementation on FPGA
FPGA design for the ARCA experiment
FPGArduino
18-545 Astroteam computer vision project repository
BitGPU is a GPU approach to solve the bitwidth optimization problem in FPGA datapaths.
Quartus Verilog Brew to test with float fix and multiplication
An CAN bus Controller implemented in Verilog
A generic class library in SystemVerilog
C++ Project taught by Doug Hogan
The homework assignments I completed as part of CMPSC 122 (http://bulletins.psu.edu/undergrad/courses/G/CMPSC/122)
Files for ongoing CMPSC 122 homework assignments.
CNC Proyect over FPGA
It's a basic computer designed using VERILOG on XILINX FPGA architecture.
Computer Architecture MIPS Verilog
ECS 154a Projects
使用Verilog设计的带四舍五入功能的浮点加法器
FPGA Communication Framework
FPGA Demos and Reference Designs for Xilinx Boards
This contains various projects involving FPGAs that I have completed or am still in the process of developing
Example design for FPGA Drive using the AXI Memory Mapped to PCI Express Bridge IP
This contains the code of a 8-bit general purpose computer impleted on a fpga board. This code won the best course project.
FPGA+SoC+Linux Boot Images (Xilinx:Zynq-Zybo Altera:de0-nano-soc)
Math Talk - Byte Exchange on with FPGA as Slave
FPGA-based shield for Arduino
Project which creates an analogic sine signal from an architecture that involves FPGA. It were used a DDS core to generate the sine and SPI communication to control DAC conversor (AD5791 Analog Devices). To choose the sine frequency and the update frequency of a new data we developed a cpp application. The "documentation" folder has more details of the project, including datasheets, state machine and block diagram.
A sandbox for testing VHDL stuffs on the Digilent ATLYS board using xilinx ISE. This includes a generic makefile for command line compilation.
HPC Implementation of dynamic microtubules calculations on CPU, GPU and FPGA Platforms
A declarative, efficient, and flexible JavaScript library for building user interfaces.
🖖 Vue.js is a progressive, incrementally-adoptable JavaScript framework for building UI on the web.
TypeScript is a superset of JavaScript that compiles to clean JavaScript output.
An Open Source Machine Learning Framework for Everyone
The Web framework for perfectionists with deadlines.
A PHP framework for web artisans
Bring data to life with SVG, Canvas and HTML. 📊📈🎉
JavaScript (JS) is a lightweight interpreted programming language with first-class functions.
Some thing interesting about web. New door for the world.
A server is a program made to process requests and deliver data to clients.
Machine learning is a way of modeling and interpreting data that allows a piece of software to respond intelligently.
Some thing interesting about visualization, use data art
Some thing interesting about game, make everyone happy.
We are working to build community through open source technology. NB: members must have two-factor auth.
Open source projects and samples from Microsoft.
Google ❤️ Open Source for everyone.
Alibaba Open Source for everyone
Data-Driven Documents codes.
China tencent open source team.