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Automatically exported from code.google.com/p/open-socemu
Development
Original issue reported on code.google.com by [email protected]
on 9 Jun 2010 at 1:01
In SimpleSlave.h
Original issue reported on code.google.com by [email protected]
on 8 Jun 2010 at 1:13
More open
Original issue reported on code.google.com by [email protected]
on 8 Jun 2010 at 9:01
Currently, the standard Memory module is read and write tolerant. Derive a
block that is only read tolerant.
Original issue reported on code.google.com by [email protected]
on 7 Jun 2010 at 9:04
Load the elf files from the CPU module
Original issue reported on code.google.com by [email protected]
on 7 Jun 2010 at 9:09
Remove this file that is not used for this tool
Original issue reported on code.google.com by [email protected]
on 8 Jun 2010 at 9:00
Development
Original issue reported on code.google.com by [email protected]
on 9 Jun 2010 at 1:01
This makes it possible to compile with new platform without requiring main code
changes
Original issue reported on code.google.com by [email protected]
on 15 Nov 2010 at 3:29
Development
Original issue reported on code.google.com by [email protected]
on 9 Jun 2010 at 1:02
What steps will reproduce the problem?
1. on a platform with multiple CPUs
All the gdbserver instances are listening on the same port. This should be
configurable through the configuration file.
Original issue reported on code.google.com by [email protected]
on 14 Nov 2010 at 1:14
What steps will reproduce the problem?
1. Try an ELF image that has somewhere an instruction of type:
LDMIA r5!,{r3-r5}
2. Run the simulation while printing the r5 values or used a debugger
3. Monitor r5 values before and after this instruction
What is the expected output? What do you see instead?
Here the final value of register r5 is the incremented address and not loaded
value. Per ARM guidelines, it should be loaded value:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/BABEFCIB.ht
ml
What version of the product are you using? On what operating system?
Current version of ARM ISS.
Please provide any additional information below.
I patched the problem with following fix and it seems to work well for me:
File armemu.cpp
void
arm::LoadMult(uint32_t instr, uint32_t address, uint32_t WBBase)
{
..
..
if (m_Aborted) {
if (BIT (21) && LHSReg != 15) {
if (!(m_AbortSig))
{
}
}
TAKEABORT;
}
//Dont change the base address register if it is target as well
//Vikas Paliwal ([email protected])
//else if (BIT (21) && LHSReg != 15 ) {
else if (BIT (21) && LHSReg != 15 && !BIT(LHSReg)) {
LSBase = WBBase;
}
/* chy 2005-11-24, over */
}
It would be helpful if you could confirm if this is indeed an issue.
Regards,
Vikas
Original issue reported on code.google.com by [email protected]
on 7 Sep 2011 at 8:44
Attachments:
Make the project build as a library that could be linked with a new platform
development environment. Then it is also necessary to move the existing
platforms as example separate projects
Original issue reported on code.google.com by [email protected]
on 15 Nov 2010 at 3:31
Development
Original issue reported on code.google.com by [email protected]
on 9 Jun 2010 at 1:07
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